Reliability of 4H-SiC(000-1) MOS Gate Oxide Using N2O Nitridation

2009 ◽  
Vol 615-617 ◽  
pp. 557-560 ◽  
Author(s):  
Takuma Suzuki ◽  
Junji Senzaki ◽  
Tetsuo Hatakeyama ◽  
Kenji Fukuda ◽  
Takashi Shinohe ◽  
...  
Keyword(s):  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Band Offset ◽  
Mos Capacitors ◽  
Conduction Band Offset ◽  
Time Dependent Dielectric Breakdown ◽  
Oxide Reliability ◽  
Mos Gate

The oxide reliability of metal-oxide-semiconductor (MOS) capacitors on 4H-SiC(000-1) carbon face was investigated. The gate oxide was fabricated by using N2O nitridation. The effective conduction band offset (Ec) of MOS structure fabricated by N2O nitridation was increased to 2.2 eV compared with Ec = 1.7 eV for pyrogenic oxidation sample of. Furthermore, significant improvements in the oxide reliability were observed by time-dependent dielectric breakdown (TDDB) measurement. It is suggested that the N2O nitridation as a method of gate oxide fabrication satisfies oxide reliability on 4H-SiC(000-1) carbon face MOSFETs.

Effect of Gate Wet Reoxidation on Reliability and Channel Mobility of Metal-Oxide-Semiconductor Field-Effect Transistors Fabricated on 4H-SiC(000-1)

2008 ◽  
Vol 600-603 ◽  
pp. 791-794 ◽  
Author(s):  
Takuma Suzuki ◽  
Junji Senzaki ◽  
Tetsuo Hatakeyama ◽  
Kenji Fukuda ◽  
Takashi Shinohe ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Field Effect ◽  
Dielectric Breakdown ◽  
Field Effect Transistors ◽  
Gate Oxide ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Channel Mobility ◽  
Time Dependent Dielectric Breakdown ◽  
Oxide Reliability

The channel mobility and oxide reliability of metal-oxide-semiconductor field-effect transistors (MOSFETs) on 4H-SiC (0001) carbon face were investigated. The gate oxide was fabricated by using dry-oxidized film followed by pyrogenic reoxidation annealing (ROA). Significant improvements in the oxide reliability were observed by time-dependent dielectric breakdown (TDDB) measurement. Furthermore, the field-effect inversion channel mobility (μFE) of MOSFETs fabricated by using pyrogenic ROA was as high as that of conventional 4H-SiC (0001) MOSFETs having the pyrogenic-oxidized gate oxide. It is suggested that the pyrogenic ROA of dry oxide as a method of gate oxide fabrication satisfies both channel mobility and oxide reliability on 4H-SiC (0001) carbon-face MOSFETs.

Evaluation of 4H-SiC Carbon Face Gate Oxide Reliability

2011 ◽  
Vol 679-680 ◽  
pp. 354-357
Author(s):  
Jody Fronheiser ◽  
Aveek Chatterjee ◽  
Ulrike Grossner ◽  
Kevin Matocha ◽  
Vinayak Tilak ◽  
...  
Keyword(s):  
Dielectric Breakdown ◽  
Inversion Layer ◽  
Gate Oxide ◽  
Dielectric Strength ◽  
Time To Failure ◽  
Research Groups ◽  
Mos Capacitors ◽  
Channel Mobility ◽  
Time Dependent Dielectric Breakdown ◽  
Oxide Reliability

The gate oxide reliability and channel mobility of carbon face (000-1) 4H Silicon Carbide (SiC) MOSFETs are investigated. Several gate oxidation processes including dry oxygen, pyrogenic steam, and nitrided oxides were investigated utilizing MOS capacitors for time dependent dielectric breakdown (TDDB), dielectric field strength, and MOSFETs for inversion layer mobility measurements. The results show the C-face can achieve reliability similar to the Si-face, however this is highly dependent on the gate oxide process. The reliability is inversely related to the field effect mobility where other research groups report that pyrogenic steam yields the highest electron mobility while this work shows it has weakest oxide in terms of dielectric strength and shortest time to failure.

Relation between Defects on 4H-SiC Epitaxial Surface and Gate Oxide Reliability

2013 ◽  
Vol 740-742 ◽  
pp. 745-748 ◽  
Author(s):  
J. Sameshima ◽  
Osamu Ishiyama ◽  
Atsushi Shimozato ◽  
K. Tamura ◽  
H. Oshima ◽  
...  
Keyword(s):  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Oxide Thickness ◽  
Wafer Surface ◽  
Cross Sectional ◽  
Mos Capacitors ◽  
Oxide Breakdown ◽  
Time Dependent Dielectric Breakdown ◽  
Oxide Reliability ◽  
Breakdown Region

Time-dependent dielectric breakdown (TDDB) measurement of MOS capacitors on an n-type 4 ° off-axis 4H-SiC(0001) wafer free from step-bunching showed specific breakdown in the Weibull distribution plots. By observing the as-grown SiC-epi wafer surface, two kinds of epitaxial surface defect, Trapezoid-shape and Bar-shape defects, were confirmed with confocal microscope. Charge to breakdown (Qbd) of MOS capacitors including an upstream line of these defects is almost the same value as that of a Wear-out breakdown region. On the other hand, the gate oxide breakdown of MOS capacitors occurred at a downstream line. It has revealed that specific part of these defects causes degradation of oxide reliability. Cross-sectional TEM images of MOS structure show that gate oxide thickness of MOS capacitor is non-uniform on the downstream line. Moreover, AFM observation of as-grown and oxidized SiC-epitaxial surfaces indicated that surface roughness of downstream line becomes 3-4 times larger than the as-grown one by oxidation process.

Current conduction mechanisms in thermal nitride and dry gate oxide grown on 4H-silicon carbide (SiC)

2017 ◽  
Vol 20 (1) ◽  
Author(s):  
Li Liu ◽  
Yin-Tang Yang
Keyword(s):  
Barrier Height ◽  
Conduction Mechanism ◽  
Gate Oxide ◽  
Annealed Sample ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Mos Capacitors ◽  
Electrical Fields ◽  
Conduction Mechanisms ◽  
Current Conduction

AbstractCurrent conduction mechanisms of SiC metal-oxide-semiconductor (MOS) capacitors on n-type 4H-SiC with or without NO annealing have been investigated in this work. It has been revealed that Fowler-Nordheim (FN) tunneling is the dominating current conduction mechanism in high electrical fields, with barrier height of 2.67 and 2.54 eV respectively for samples with NO and without NO annealing. A higher barrier height for NO-annealed sample indicates the effect of N element on the SiC/SiO

Monitoring on Creation and Annihilation of Interface Trap Levels with NO Oxidation, Re-Oxidation and N2 Annealing with Conductance Measurements

2020 ◽  
Vol 1004 ◽  
pp. 595-600
Author(s):  
Xiang Zhou ◽  
Collin W. Hitchcock ◽  
Rajendra P. Dahal ◽  
Gyanesh Pandey ◽  
Jacob Kupernik ◽  
...  
Keyword(s):  
Gate Oxide ◽  
Metal Oxide Semiconductor ◽  
No Oxidation ◽  
Oxide Semiconductor ◽  
Electron Trapping ◽  
Process Conditions ◽  
Interface Trap ◽  
Annihilation Process ◽  
Mos Capacitors ◽  
Trap Levels

We have determined, using the Conductance-Frequency (G-ω) Technique, the creation and annihilation process of the 3 interface trap levels (OX, OX’ and NI levels) previously reported [1-3] and their possible correlation to inversion electron trapping and mobilities. The measurements were carried out on various 4H-SiC Metal Oxide Semiconductor (MOS) capacitors that have been processed using several gate oxide processes [2,5,6]. Our analysis focus on the correlation of the interface trap levels on the process conditions so as to first understand and then control their formation.

Gate Oxide Reliability of SiC MOSFETs and Capacitors Fabricated on 150mm Wafers

2019 ◽  
Vol 963 ◽  
pp. 745-748 ◽  
Author(s):  
Daniel J. Lichtenwalner ◽  
Shadi Sabri ◽  
Edward van Brunt ◽  
Brett Hull ◽  
Satyaki Ganguly ◽  
...  
Keyword(s):  
Activation Energy ◽  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Large Area ◽  
Temperature Dependent ◽  
Acceleration Parameter ◽  
Time Dependent Dielectric Breakdown ◽  
Oxide Reliability ◽  
Voltage Breakdown ◽  
Linear Field

Gate oxide reliability on silicon carbide MOSFETs and large-area SiC N-type capacitors was studied for devices fabricated on 150mm SiC substrates. Oxide lifetime was measured under accelerated stress conditions using constant-voltage time-dependent dielectric breakdown (TDDB) testing, or ramped-voltage breakdown (RBD) testing. TDDB results from 1200V Gen3 MOSFETs reveal a field acceleration parameter of about 35 nm/V, similar to values reported for SiO2 on silicon. Temperature-dependent RBD tests of large capacitors from 25°C to 200°C reveal an apparent activation energy of 0.24eV, indicating that oxide lifetime increases as the temperature is decreased, as expected. Using this acceleration parameter and activation energy in the linear field model, the gate oxide lifetime from MOSFET TDDB testing extrapolates to greater than 108 hours at a gate voltage of 15 VGS at 175°C.

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