Monitoring on Creation and Annihilation of Interface Trap Levels with NO Oxidation, Re-Oxidation and N2 Annealing with Conductance Measurements

2020 ◽  
Vol 1004 ◽  
pp. 595-600
Author(s):  
Xiang Zhou ◽  
Collin W. Hitchcock ◽  
Rajendra P. Dahal ◽  
Gyanesh Pandey ◽  
Jacob Kupernik ◽  
...  

We have determined, using the Conductance-Frequency (G-ω) Technique, the creation and annihilation process of the 3 interface trap levels (OX, OX’ and NI levels) previously reported [1-3] and their possible correlation to inversion electron trapping and mobilities. The measurements were carried out on various 4H-SiC Metal Oxide Semiconductor (MOS) capacitors that have been processed using several gate oxide processes [2,5,6]. Our analysis focus on the correlation of the interface trap levels on the process conditions so as to first understand and then control their formation.

2009 ◽  
Vol 615-617 ◽  
pp. 557-560 ◽  
Author(s):  
Takuma Suzuki ◽  
Junji Senzaki ◽  
Tetsuo Hatakeyama ◽  
Kenji Fukuda ◽  
Takashi Shinohe ◽  
...  

The oxide reliability of metal-oxide-semiconductor (MOS) capacitors on 4H-SiC(000-1) carbon face was investigated. The gate oxide was fabricated by using N2O nitridation. The effective conduction band offset (Ec) of MOS structure fabricated by N2O nitridation was increased to 2.2 eV compared with Ec = 1.7 eV for pyrogenic oxidation sample of. Furthermore, significant improvements in the oxide reliability were observed by time-dependent dielectric breakdown (TDDB) measurement. It is suggested that the N2O nitridation as a method of gate oxide fabrication satisfies oxide reliability on 4H-SiC(000-1) carbon face MOSFETs.


Author(s):  
Li Liu ◽  
Yin-Tang Yang

AbstractCurrent conduction mechanisms of SiC metal-oxide-semiconductor (MOS) capacitors on n-type 4H-SiC with or without NO annealing have been investigated in this work. It has been revealed that Fowler-Nordheim (FN) tunneling is the dominating current conduction mechanism in high electrical fields, with barrier height of 2.67 and 2.54 eV respectively for samples with NO and without NO annealing. A higher barrier height for NO-annealed sample indicates the effect of N element on the SiC/SiO


2001 ◽  
Vol 693 ◽  
Author(s):  
R. Mehandru ◽  
B.P. Gila ◽  
J. Kim ◽  
J.W. Johnson ◽  
K.P. Lee ◽  
...  

AbstractGaN metal oxide semiconductor diodes were demonstrated utilizing Sc2O3 as the gate oxide. Sc2O3 was grown at 100°C on MOCVD grown n-GaN layers in a molecular beam epitaxy (MBE) system, using a scandium elemental source and an Electron Cyclotron Resonance (ECR) oxygen plasma. Ar/Cl2 based discharges was used to remove Sc2O3, in order to expose the underlying n-GaN for ohmic metal deposition in an Inductively Coupled Plasma system. Electron beam deposited Ti/Al/Pt/Au and Pt/Au were utilized as ohmic and gate metallizations, respectively. An interface trap density of 5 × 1011 eV-1cm-2was obtained with the Terman method. Conductance-voltage measurements were also used to estimate the interface trap density and a slightly higher number was obtained as compared to the Terman method. Results of capacitance measurements at elevated temperature (up to 300°C) indicated the presence of deep states near the interface.


2014 ◽  
Vol 806 ◽  
pp. 139-142 ◽  
Author(s):  
Yogesh K. Sharma ◽  
A.C. Ahyi ◽  
Tamara Issacs-Smith ◽  
M.R. Jennings ◽  
S.M. Thomas ◽  
...  

The NO (nitric oxide) passivation process for 4H-SiC MOSFETs (silicon carbide metal-oxide-semiconductor filed effect transistors) effectively reduces the interface trap density and increases the inversion channel mobility from less that 10 to around 35cm2/V.s, only 5% of the bulk mobility. Recent results on the phosphorous passivation of the SiO2/4H-SiC interface have shown that it improves the mobility to about 90 cm2/V.s. Phosphorous passivation converts oxide (SiO2) into phosphosilicate glass (PSG) which is a polar material and results in device instabilities under abias-temperature stress (BTS) measurements. To limit the polarization effect, a new thin PSG process has been developed. The interface trap density of 4H-SiC-MOS capacitors using this process is as low as 3x1011cm-2eV-1. BTS results on MOSFETs have shown that the thin PSG devices are as stable as NO passivated devices with mobility around 80 cm2/V.s.


1992 ◽  
Vol 242 ◽  
Author(s):  
Nitya N. Singh ◽  
A. Rys ◽  
A. U. Ahmed

ABSTRACTFabrication processes of metal-oxide semiconductor (MOS) capacitors on n-type, Si-face, 6H-SiC were studied. The effects of thermal oxidation conditions at temperatures between 1100 and 1250°C on the electrical properties of MOS capacitors were determined. The wafers were annealed under argon to improve the C-V characteristics. C-V characteristics of AI-SiO2-SiC metal-oxide-semiconductor were measured at high frequency in the dark and under illumination. In the dark inversion does not occur, probably owing to the absence of minority carriers due to the large band gap of 6H-SiC. The accumulation, depletion, and inversion regions were clearly observed when the C-V measurements were made under illumination for both wet and dry thermally grown oxides. The interface trap densities and emission time constants of fast states were determined by ac conductance measurements. From the analysis of data we obtained a total of Fixed charges and the slow interface traps, Nf + NssSlow of 1.5 to 3.3 × 1012 cm-2, fast interface trap densities, NssFast of 0.5 to 1.7 × 1011 cm-2 eV-1 and emission times constant of 0.3 to 1.4 μsec for wet oxidation. For dry oxidation, Nf + N, ssSlow of 3.5 to 11.2 × 10cm-2, NssFast of 0.7 to 1.25 × 1010 cm-2 eV-1 and emission time constants of 0.6 to 2 μsec were obtained.


2010 ◽  
Vol 645-648 ◽  
pp. 515-518 ◽  
Author(s):  
Dai Okamoto ◽  
Hiroshi Yano ◽  
Yuki Oshiro ◽  
Tomoaki Hatayama ◽  
Yukiharu Uraoka ◽  
...  

Characteristics of metal–oxide–semiconductor (MOS) capacitors and MOS field-effect transistors (MOSFETs) fabricated by direct oxidation of C-face 4H-SiC in NO were investigated. It was found that nitridation of the C-face 4H-SiC MOS interface generates near-interface traps (NITs) in the oxide. These traps capture channel mobile electrons and degrade the performance of MOSFETs. The NITs can be reduced by unloading the samples at room temperature after oxidation. It is important to reduce not only the interface states but also the NITs to fabricate high-performance C-face 4H-SiC MOSFETs with nitrided gate oxide.


2001 ◽  
Vol 693 ◽  
Author(s):  
J. Kim ◽  
B. P. Gila ◽  
R. Mehandru ◽  
J.W. Johnson ◽  
J. H. Shin ◽  
...  

AbstractGaN metal oxide semiconductor diodes were demonstrated utilizing MgO as the gate oxide. MgO was grown at 100°C on MOCVD grown n-GaN in a molecular beam epitaxy system using a Mg elemental source and an electron cyclotron resonance oxygen plasma. H3PO4 based wet-chemical etchant was used to remove MgO to expose the underlying n-GaN for ohmic metal deposition. Electron deposited Ti/Al/Pt/Au and Pt/Au were utilized as ohmic and gate metallization, respectively. An interface trap density of low-to-mid 1011 eV-1cm-2was obtained from temperature conductance-voltage measurements. Terman method was also used to estimate the interface trap density and a slight lower number was obtained as compared to the conductance method. Results from elevated temperature (up to 300°C) conductance measurements showed an interface state density roughly three times higher(6x1011 eV–1 cm-2 ) than at 25°C.


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