Progress in Growth of Thick Epitaxial Layers on 4 Degree Off-Axis 4H SiC Substrates

2012 ◽  
Vol 717-720 ◽  
pp. 137-140 ◽  
Author(s):  
Jie Zhang ◽  
Gil Yong Chung ◽  
Edward K. Sanchez ◽  
Mark J. Loboda ◽  
Siddarth G. Sundaresan ◽  
...  
Keyword(s):  
High Voltage ◽  
Smooth Surface ◽  
Carrier Lifetime ◽  
Defect Density ◽  
Epitaxial Layers

This paper reports the progress of the thick epitaxy development at Dow Corning. Epiwafers with thickness of 50 – 100 m have been grown on 4° off-axis 76mm 4H SiC substrates. Smooth surface with RMS roughness below 1nm and defect density down to 2 cm-2 are achieved for 80 - 100 m thick epiwafers. Long carrier lifetime of 2 – 4 s are routinely obtained, and low BPD density in the range of 50 down to below 10 cm-2 is confirmed. High voltage JBS diodes have been successfully fabricated on these wafers with thick epitaxial layers.

Silicon Carbide Hot-Wall Epitaxy for Large-Area, High-Voltage Devices

2008 ◽  
Vol 1069 ◽  
Author(s):  
Michael O'Loughlin ◽  
K. G. Irvine ◽  
J. J. Sumakeris ◽  
M. H. Armentrout ◽  
B. A. Hull ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Process Optimization ◽  
High Voltage ◽  
Defect Density ◽  
Epitaxial Layers ◽  
Power Devices ◽  
Large Area ◽  
Device Processing ◽  
Defect Densities ◽  
Hot Wall Epitaxy

ABSTRACTThe growth of thick silicon carbide (SiC) epitaxial layers for large-area, high-power devices is described. Horizontal hot-wall epitaxial reactors with a capacity of three, 3-inch wafers have been employed to grow over 350 epitaxial layers greater than 100 μm thick. Using this style reactor, very good doping and thickness uniformity and run-to-run reproducibility have been demonstrated. Through a combination of reactor design and process optimization we have been able to achieve the routine production of thick epitaxial layers with morphological defect densities of around 1 cm−2. The low defect density epitaxial layers in synergy with improved substrates and SiC device processing have resulted in the production of 10 A, 10 kV junction barrier Schottky (JBS) diodes with good yield (61.3%).

High Voltage and Fast Switching Reverse Recovery Characteristics of 4H-SiC PiN Diode

2014 ◽  
Vol 778-780 ◽  
pp. 841-844 ◽  
Author(s):  
Koji Nakayama ◽  
Shuji Ogata ◽  
Toshihiko Hayashi ◽  
Tetsuro Hemmi ◽  
Atsushi Tanaka ◽  
...  
Keyword(s):  
High Voltage ◽  
Recovery Time ◽  
Carrier Lifetime ◽  
Low Voltage ◽  
Reduction Rate ◽  
Drift Region ◽  
Pin Diode ◽  
Fully Depleted ◽  
Fast Switching ◽  
Reverse Recovery Time

The reverse recovery characteristics of a 4H-SiC PiN diode under higher voltage and faster switching are investigated. In a high-voltage 4H-SiC PiN diode, owing to an increased thickness, the drift region does not become fully depleted at a relatively low voltage Furthermore, an electron–hole recombination must be taken into account when the carrier lifetime is equal to or shorter than the reverse recovery time. High voltage and fast switching are therefore needed for accurate analysis of the reverse recovery characteristics. The current reduction rate increases up to 2 kA/μs because of low stray inductance. The maximum reverse voltage during the reverse recovery time reaches 8 kV, at which point the drift layer is fully depleted. The carrier lifetime at the high level injection is 0.086 μs at room temperature and reaches 0.53 μs at 250 °C.

scholarly journals Study on Annealing Process of Aluminum Oxide Passivation Layer for PERC Solar Cells

Coatings ◽  
2021 ◽  
Vol 11 (9) ◽  
pp. 1052
Author(s):  
Yu-Chun Huang ◽  
Ricky Wenkuei Chuang
Keyword(s):  
Carrier Lifetime ◽  
Defect Density ◽  
Surface Recombination ◽  
Chemical Vapor ◽  
Minority Carrier Lifetime ◽  
Atomic Layer ◽  
Film Structure ◽  
Open Circuit ◽  
Annealing Process ◽  
Surface Recombination Velocity

In this study, Atomic Layer Deposition (ALD) equipment was used to deposit Al2O3 film on a p-type silicon wafer, trimethylaluminum (TMA) and H2O were used as precursor materials, and then the post-annealing process was conducted under atmospheric pressure. The Al2O3 films annealed at different temperatures between 200–500 °C were compared to ascertain the effect of passivation films and to confirm the changes in film structure and thickness before and after annealing through TEM images. Furthermore, the negative fixed charge and interface defect density were analyzed using the C-V measurement method. Photo-induced carrier generation was used to measure the effective minority carrier lifetime, the implied open-circuit voltage, and the effective surface recombination velocity of the film. The carrier lifetime was found to be the longest (2181.7 μs) for Al2O3/Si post-annealed at 400 °C. Finally, with the use of VHF (40.68 MHz) plasma-enhanced chemical vapor deposition (PECVD) equipment, a silicon nitride (SiNx) film was plated as an anti-reflection layer over the front side of the wafer and as a capping layer on the back to realize a passivated emitter and rear contact (PERC) solar cell with optimal efficiency up to 21.54%.

Homoepitaxial Chemical Vapor Deposition of up to 150 μm Thick 4H-SiC Epilayers in a 10×100 mm Batch Reactor

2016 ◽  
Vol 858 ◽  
pp. 129-132 ◽  
Author(s):  
Bernd Thomas ◽  
Jie Zhang ◽  
Gil Yong Chung ◽  
Willie Bowen ◽  
Victor Torres ◽  
...  
Keyword(s):  
Carrier Lifetime ◽  
Statistical Data ◽  
Laser Light ◽  
Defect Density ◽  
Batch Reactor ◽  
Chemical Vapor ◽  
Layer Growth ◽  
Average Lifetime ◽  
Thick Layers

In this paper we present results on the growth of low-doped thick epitaxial layers on 4° off-oriented 4H-SiC using a warm-wall multi-wafer CVD system (Aixtron VP2800WW). Statistical data on doping and thickness of 25 μm to 40 μm layer growth show results similar to standard epilayer growth (5-15 μm). Improvements in thickness and doping uniformity as well as the reduction of epitaxial defects has boosted the quality of 25 μm to 40 μm thick epilayers. Laser light scattering measurements resulted in projected device yields with median values of 83% and 96% for 5×5 mm2 and 2×2 mm2 die size, respectively. This corresponds to a low epitaxial defect density of < 0.75 cm-2 in 25-40 μm thick epilayers. This paper also presents results of 60 μm to 150 μm thick epitaxial layer growth. Excellent results for doping, thickness and carrier lifetime were achieved. As an example results of a fully loaded 10×100mm run with 150 μm thick epilayers are presented. Wafer-to-wafer doping and thickness values of 3.7 % and 3.4% for sigma/mean were accomplished, respectively. Typical average lifetime values of 5 μs to 6 μs were measured on the 150 μm thick layers without post-epi treatments.

Carrier Lifetimes in 4H-SiC Epitaxial Layers on the C-Face Enhanced by Carbon Implantation

2018 ◽  
Vol 924 ◽  
pp. 432-435 ◽  
Author(s):  
Mitsuhiro Kushibe ◽  
Johji Nishio ◽  
Ryosuke Iijima ◽  
Akira Miyasaka ◽  
Hirokuni Asamizu ◽  
...  
Keyword(s):  
Carrier Concentration ◽  
Layer Thickness ◽  
Epitaxial Layer ◽  
Carrier Lifetime ◽  
Epitaxial Layers ◽  
Carrier Lifetimes ◽  
Post Annealing

Carrier lifetime in low carrier concentration 4H-SiC epitaxial layers grown on the C-face was enhanced by using carbon implantation and post annealing. The measured carrier lifetime increased with the thickness of the epitaxial layer and was 11.4 µs for the 150 µm thick epitaxial layer. The internal carrier lifetime was estimated as 21 µs from the dependence of the measured carrier lifetime on the epitaxial layer thickness. This value is almost comparable to the reported values of the internal carrier lifetime for the layers grown on the Si-face.

The Heteroepitaxy and Characterization of Inp and GaInP on Silicon for Solar Cell Applications

1990 ◽  
Vol 198 ◽  
Author(s):  
M.M. Al-Jassim ◽  
R.K. Ahrenkiel ◽  
M.W. Wanlass ◽  
J.M. Olson ◽  
S.M. Vernon
Keyword(s):  
Carrier Lifetime ◽  
Minority Carrier ◽  
Defect Density ◽  
Minority Carrier Lifetime ◽  
Buffer Layers ◽  
Threading Dislocation ◽  
Si Substrates ◽  
Threading Dislocation Density ◽  
Direct Growth

ABSTRACTInP and GaInP layers were heteroepitaxially grown on (100) Si substrates by atmospheric pressure MOCVD. TEM and photoluminescence (PL) were used to measure the defect density and the minority carrier lifetime in these structures. The direct growth of InP on Si resulted in either polycrystalline or heavily faulted single-crystal layers. The use of GaAs buffer layers in InP/Si structures gave rise to significantly improved morphology and reduced the threading dislocation density. The best InP/Si layers in this study were obtained by using GaAs-GaInAs graded buffers. Additionally, the growth of high quality GaInP on Si was demonstrated. The minority carrier lifetime of 7 ns in these layers is the highest of any III-V/Si semiconductor measured in our laboratory.

Mobility-Lifetime Products in a-Si:H and the Dangling Bond Recombination Model

1992 ◽  
Vol 258 ◽  
Author(s):  
E. Morgado
Keyword(s):  
Fermi Level ◽  
Carrier Lifetime ◽  
Minority Carrier ◽  
Defect Density ◽  
Minority Carrier Lifetime ◽  
Localized States ◽  
Correlated Electrons ◽  
Recombination Model ◽  
Model Equations ◽  
Determinant Factor

ABSTRACTFermi level and light intensity dependences of electron and hole lifetimes have been calculated using a recombination model which considers positively correlated dangling bonds as the only localized states in the gap. The model equations have been solved numerically taking into account the non-equilibrium statistics of correlated electrons and the Fermi level dependence of the defect density. The results are in agreement with the anticorrelated behavior of the majority' and minority carrier μτ products observed in a-Si:H. The majority carrier lifetime is found to be more sensitive to the photogeneration rate than the minority carrier lifetime. The position of the Fermi level with respect to the energies of the D° and D- centers in the gap is a determinant factor of the (°τ)e/(μτ)h ratio.

Epitaxy of GaAs thin film with low defect density and smooth surface on Si substrate

2014 ◽  
Vol 35 (7) ◽  
pp. 073002 ◽  
Author(s):  
Xuliang Zhou ◽  
Jiaoqing Pan ◽  
Renrong Liang ◽  
Jing Wang ◽  
Wei Wang
Keyword(s):  
Thin Film ◽  
Smooth Surface ◽  
Defect Density ◽  
Si Substrate
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