600 V -Class V-Groove SiC MOSFETs

2014 ◽  
Vol 778-780 ◽  
pp. 931-934 ◽  
Author(s):  
Yu Saitoh ◽  
Masaki Furumai ◽  
Toru Hiyoshi ◽  
Keiji Wada ◽  
Takeyoshi Masuda ◽  
...  
Keyword(s):  
Low Temperature ◽  
Oxide Layer ◽  
Room Temperature ◽  
Gate Oxide ◽  
Class V ◽  
Turn On ◽  
Switching Losses ◽  
Thick Oxide Layer ◽  
Switching Characteristics ◽  
Off Time

The authors applied a thick gate oxide layer at the trench bottoms to 600 V class truncated V-groove MOSFETs of which MOS channels were formed on 4H-SiC (0-33-8) facets and validated the static and switching characteristics. The specific on-resistance and the threshold voltage were 3.6 mΩ cm2(VGS=18 V,VDS=1 V) and about 1 V (normally-off), respectively. The breakdown voltage of the MOSFET with a thick oxide layer was 1,125 V (IDS=1 μA). The switching losses during turn-on and turn-off operations were estimated to be 105.8 μJ and 82.5 μJ (300 V, 10 A) at room temperature. The switching characteristics exhibited low temperature dependence for turn-on/off time.

Trench-MOSFETs on 4H-SiC

2016 ◽  
Vol 858 ◽  
pp. 848-851 ◽  
Author(s):  
Christian T. Banzhaf ◽  
Stephan Schwaiger ◽  
Dick Scholten ◽  
Stefan Noll ◽  
Michael Grieb
Keyword(s):  
Room Temperature ◽  
Switching Voltage ◽  
Turn On ◽  
Switching Losses ◽  
Blocking Voltage ◽  
Unit Cells ◽  
Large Maximum ◽  
Switching Characteristics ◽  
Efficient Power ◽  
State Resistance

This paper introduces n-channel normally-off Trench-MOSFETs on 4H-SiC featuring a blocking voltage of 600 V and 1200 V. The Trench-MOSFETs exhibit a specific room temperature on-state resistance RDS,on of 1.5 mΩ cm² and 2.7 mΩ cm², respectively. It is shown that a further reduction of the RDS,on by approximately 25 % can be achieved using square-shaped or hexagonal unit cells instead of stripe-shaped unit cells. The Trench-MOSFET switching characteristics using a double pulse setup with a switching current Isw of 100 A and a switching voltage Vsw of 450 V is presented and discussed. The short turn-off and turn-on times in the range of several ten nanoseconds yield large maximum disw/dt and dvsw/dt values, which enable highly efficient power conversion with low switching losses.

Reliability and Ruggedness of 1200V SiC Planar Gate MOSFETs Fabricated in a High Volume CMOS Foundry

2018 ◽  
Vol 924 ◽  
pp. 697-702 ◽  
Author(s):  
Sauvik Chowdhury ◽  
Levi Gant ◽  
Blake Powell ◽  
Kasturirangan Rangaswamy ◽  
Kevin Matocha
Keyword(s):  
Room Temperature ◽  
Stress Testing ◽  
Short Circuit ◽  
Gate Oxide ◽  
High Volume ◽  
Inductive Load ◽  
Switching Losses ◽  
Oxide Reliability ◽  
Silicon Cmos

This paper presents the performance, reliability and ruggedness characterization of 1200V, 80mΩ rated SiC planar gate MOSFETs, fabricated in a high volume, 150mm silicon CMOS foundry. The devices showed a specific on-resistance of 5.1 mΩ.cm2 at room temperature, increasing to 7.5 mΩ.cm2 at 175 °C. Total switching losses were less than 300μJ (VDD = 800V, ID = 20A). The devices showed excellent gate oxide reliability with VTH shifts under 0.2V for extended HTGB stress testing at 175 °C for up to 5500 hours (VGS = 25V) and 2500 hours (VGS = -10V). Ruggedness performance such as unclamped inductive load switching and short circuit capability are also discussed.

Fast Switching Characteristics of 4H-SiC RESURF-Type JFET

2008 ◽  
Vol 600-603 ◽  
pp. 1095-1098
Author(s):  
Kazuhiro Fujikawa ◽  
Kenichi Sawada ◽  
Takashi Tsuno ◽  
Hideto Tamaso ◽  
Shin Harada ◽  
...  
Keyword(s):  
Power Supplies ◽  
Fast Switching ◽  
Turn On ◽  
Dc Power ◽  
Surface Field ◽  
Switching Characteristics ◽  
Off Time ◽  
Reduced Surface ◽  
Switching Devices

400V/2.5A 4H-SiC JFETs having a reduced surface field (RESURF) structure were fabricated. Measurements on the static and switching characteristics were carried out. The on-resistance was 0.86 W. The turn-on time (ton) and the turn-off time (toff) were 8ns and 10 ns, respectively. The fabricated JFETs showed low on-resistance and fast switching characteristics. 4H-SiC RESURF-type JFETs, which is a sort of lateral transistor, are preferable to a module configuration of switching devices. Moreover, they are promising for application to DC power supplies with higher efficiency and smaller size owing to their low on-resistance and fast switching characteristics.

scholarly journals Static and Switching Characteristics of 10 kV-Class Silicon Carbide Bipolar Junction Transistors and Darlingtons

2020 ◽  
Vol 1004 ◽  
pp. 923-932
Author(s):  
Besar Asllani ◽  
Pascal Bevilacqua ◽  
Hervé Morel ◽  
Dominique Planson ◽  
Luong Viet Phung ◽  
...  
Keyword(s):  
Room Temperature ◽  
State Of The Art ◽  
High Current Density ◽  
Active Area ◽  
Bipolar Junction Transistors ◽  
High Current ◽  
Bipolar Junction Transistor ◽  
Turn On ◽  
Junction Transistor ◽  
Switching Characteristics

This paper reports the device design, fabrication and characterisation of 10 kV-class Bipolar Junction Transistor (BJT). Manufactured devices have been packaged in single BJT, two paralleled BJTs and Darlington configurations. The static and switching characteristics of the resulting devices have been measured. The BJTs (2.4mm² active area) show a specific on-resistance as low as 198 mΩ·cm² at 100 A/cm² and room temperature for a βMax of 9.6, whereas the same active area Darlington beats the unipolar limit with a specific on-resistance of 102 mΩ·cm² at 200 A/cm² (β=11) for a βMax of 69. Double pulse tests reveal state of the art switching with very sharp dV/dt and di/dt. Turn-on is operated at less than 100 ns for an EON lower than 4mJ, whereas the turn-off takes longer times due to tail current resulting in EOFF of 17.2 mJ and 50 mJ for the single BJT and Darlington respectively when operated at high current density. Excellent parallelisation have been achieved.

High-Temperature Switching Characteristics of 6H-SiC Thyristor

1996 ◽  
Vol 423 ◽  
Author(s):  
K. Xie ◽  
J. R. Flemish ◽  
T. Burke ◽  
W. R. Buchwald ◽  
J. H. Zhao
Keyword(s):  
High Temperature ◽  
Current Density ◽  
Operating Temperature ◽  
Time Increase ◽  
Temperature Range ◽  
Turn On ◽  
Switched Current ◽  
Switching Characteristics ◽  
Off Time ◽  
Bias Condition

AbstractA 280 V 6H-SiC thyristor has been fabricated and characterized. The switching characteristics of the SiC thyristor were investigated over a temperature range from 23 °C to 400 °C, with a switched current density of 4900 A/cm2 being observed under pulse bias condition. The thyristor has shown a dV/dt of 400 V/ms. Both the turn-on time and turn-off time increase significantly at 400 °C. The thyristor forward breakover voltage decreases by only 5% when the operating temperature is increased from 23 °C to 400 °C.

Low temperature operation of ultra-thin gate oxide sub-0.1 μm MOSFETs

2002 ◽  
Vol 12 (3) ◽  
pp. 57-60 ◽  
Author(s):  
B. Cretu ◽  
F. Balestra ◽  
G. Ghibaudo ◽  
G. Guégan
Keyword(s):  
Low Temperature ◽  
Gate Oxide ◽  
Thin Gate Oxide

Survival of mouse blastocysts after low-temperature preservation under high pressure

2004 ◽  
Vol 52 (4) ◽  
pp. 479-487 ◽  
Author(s):  
Cs. Pribenszky ◽  
M. Molnár ◽  
S. Cseh ◽  
L. Solti
Keyword(s):  
Phase Transition ◽  
Hydrostatic Pressure ◽  
Low Temperature ◽  
High Hydrostatic Pressure ◽  
Room Temperature ◽  
Freezing Point ◽  
Significant Loss ◽  
Embryo Cryopreservation ◽  
Subzero Temperatures ◽  
Survival Capacity

Cryoinjuries are almost inevitable during the freezing of embryos. The present study examines the possibility of using high hydrostatic pressure to reduce substantially the freezing point of the embryo-holding solution, in order to preserve embryos at subzero temperatures, thus avoiding all the disadvantages of freezing. The pressure of 210 MPa lowers the phase transition temperature of water to -21°C. According to the results of this study, embryos can survive in high hydrostatic pressure environment at room temperature; the time embryos spend under pressure without significant loss in their survival could be lengthened by gradual decompression. Pressurisation at 0°C significantly reduced the survival capacity of the embryos; gradual decompression had no beneficial effect on survival at that stage. Based on the findings, the use of the phenomena is not applicable in this form, since pressure and low temperature together proved to be lethal to the embryos in these experiments. The application of hydrostatic pressure in embryo cryopreservation requires more detailed research, although the experience gained in this study can be applied usefully in different circumstances.

An Effective SIMS Methodology for GOI Contamination Analysis

2013 ◽  
Author(s):  
Yanhua Huang ◽  
Lei Zhu ◽  
Kenny Ong ◽  
Hanwei Teo ◽  
Younan Hua
Keyword(s):  
Oxide Layer ◽  
Secondary Ion Mass Spectrometry ◽  
Gate Oxide ◽  
Sample Surface ◽  
Low Energy ◽  
Cross Contamination ◽  
Common Effect ◽  
Sims Analysis ◽  
Secondary Ion ◽  
Lower Background

Abstract Contamination in the gate oxide layer is the most common effect which cause the gate oxide integrate (GOI) issue. Dynamic Secondary Ion Mass Spectrometry (SIMS) is a mature tool for GOI contamination analysis. During the sample preparation, all metal and IDL layers above poly should be removed because the presence of these layers added complexity for the subsequent SIMS analysis. The normal delayering process is simply carried out by soaking the sample in the HF solution. However, the poly surface is inevitably contaminated by surroundings even though it is already a practice to clean with DI rinse and tape. In this article, TOFSIMS with low energy sputter gun is used to clean the sample surface after the normal delayering process. The residue signals also can be monitored by TOF SIMS during sputtering to confirm the cross contamination is cleared. After that, a much lower background desirable by dynamic SIMS. Thus an accurate depth profile in gate oxide layer can be achieved without the interference from surface.

Experimental Studies of New GaAs Metal/Insulator/p-n+Switches Using Low Temperature Oxide

2002 ◽  
Vol 25 (3) ◽  
pp. 233-237
Author(s):  
K. F. Yarn
Keyword(s):  
Low Temperature ◽  
Negative Differential Resistance ◽  
Doping Concentration ◽  
Experimental Studies ◽  
Differential Resistance ◽  
Switching Behavior ◽  
Metal Insulator ◽  
Turn On ◽  
Temperature Oxide ◽  
Phase Chemical

First observation of switching behavior is reported in GaAs metal-insulator-p-n+structure, where the thin insulator is grown at low temperature by a liquid phase chemical-enhanced oxide (LPECO) with a thickness of 100 Å. A significant S-shaped negative differential resistance (NDR) is shown to occur that originates from the regenerative feedback in a tunnel metal/insulator/semiconductor (MIS) interface andp-n+junction. The influence of epitaxial doping concentration on the switching and holding voltages is investigated. The switching voltages are found to be decreased when increasing the epitaxial doping concentration, while the holding voltages are almost kept constant. A high turn-off/turn-on resistance ratio up to105has been obtained.

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