High-k Gate Dielectrics on Silicon and Germanium: Impact of Surface Preparation

2005 ◽  
Vol 103-104 ◽  
pp. 3-6 ◽  
Author(s):  
Alessio Beverina ◽  
M.M. Frank ◽  
H. Shang ◽  
S. Rivillon ◽  
F. Amy ◽  
...  
Keyword(s):  
Hafnium Oxide ◽  
Gate Dielectrics ◽  
Surface Preparation ◽  
Semiconductor Surface ◽  
High K ◽  
Prime Concern ◽  
High Carrier Mobility ◽  
High Carrier ◽  
Silicon And Germanium ◽  
The Impact

We review the impact of semiconductor surface preparation on the performance of metal-oxidesemiconductor field-effect transistor (MOSFET) gate stacks. We discuss high-permittivity dielectrics such as hafnium oxide and aluminum oxide on silicon and on the high carrier mobility substrate germanium. On Si, scaling of the gate stack is the prime concern. On Ge, fundamental issues of chemical and electrical passivation need to be resolved. Surface treatments considered include oxidation, nitridation, hydrogenation, chlorination, and organic functionalization.

Nanostructured Silicon-based Composites for High Temperature Thermoelectric Applications

2010 ◽  
Vol 1267 ◽  
Author(s):  
Sabah Bux ◽  
Richard B Kaner ◽  
Jean-Pierre Fleurial
Keyword(s):  
Silicon Germanium ◽  
Waste Heat ◽  
Low Cost ◽  
Electric Transport ◽  
High Pressure Sintering ◽  
High Carrier Mobility ◽  
High Carrier ◽  
Low Toxicity ◽  
Silicon Based ◽  
The Impact

AbstractRecently nanostructured bulk silicon and silicon-germanium have achieved large increases in the thermoelectric figure of merit (ZT). The ZT enhancement is attributed to a significant reduction in the lattice thermal conductivity while maintaining relatively high carrier mobility. Silicon-based thermoelectric devices are attractive due to their low-toxicity, thermal stability, low density, relative abundance and low cost of production. Although significant enhancements in ZT have been achieved using the nanostructuring route, additional decoupling of the thermal and electric transport terms is still necessary in order for silicon-based materials to be viable for thermoelectric applications such as waste heat recovery or radioisotope thermoelectric generators. It is theorized that additional increases in ZT could be achieved by forming composites with nanostructured inert inclusions to further scatter the heat-carrying phonons. Here we present the impact of insulating and conductive nanoparticle composites on ZT. The nanostructured composites are formed via ball milling and high pressure sintering of the nanoparticles. The thermoelectric properties and microstructure of the silicon-based composites are discussed.

Progress in Epitaxial Oxides on Semiconductors

2002 ◽  
Vol 747 ◽  
Author(s):  
Z. Yu ◽  
Y. Liang ◽  
H. Li ◽  
J. Curless ◽  
C. Overgaard ◽  
...  
Keyword(s):  
Gate Dielectrics ◽  
Surface Preparation ◽  
Future Generation ◽  
Silicon On Insulator ◽  
Buffer Layers ◽  
Oxide Semiconductor ◽  
Perovskite Oxide ◽  
High Quality ◽  
Mos Capacitors ◽  
High K

ABSTRACTIn this paper, we review the recent progress in the area of epitaxial oxides on semiconductors at Motorola Labs. Critical issues such as surface preparation, initial nucleation and growth behaviors of SrTiO3 (STO) thin film epitaxy on Si(001) are addressed. Using a systematic approach, high-quality epitaxial STO films are successfully grown on semiconductor substrates such as Si, silicon-on-insulator (SOI) and Ge. Amorphous interfacial layer between the epitaxial STO and the semiconductor can be eliminated or tailored by controlling oxide growth process and parameters. STO-based metal-oxide-semiconductor (MOS) capacitors and transistors are fabricated and tested, in order to explore the potential of STO as high-k gate dielectrics for future generation CMOS transistor technology. In addition, high-quality STO epitaxial films are utilized as thin buffer layers for fabricating integrated oxide heterostructures on semiconductors. Various perovskite oxide films such as SrZrO3, LaAlO3 and Pb(Zr,Ti)O3 are deposited epitaxially on STO-buffered Si(001) for potential high-k gate dielectrics and surface-acoustic-wave (SAW) device applications.

Sub 2 nm Thick Zirconium Doped Hafnium Oxide High-K Gate Dielectrics

2019 ◽  
Vol 1 (5) ◽  
pp. 447-454 ◽  
Author(s):  
Yue Kuo ◽  
Jiang Lu ◽  
Jiong Yan ◽  
Tao Yuan ◽  
Hyun Chul Kim ◽  
...  
Keyword(s):  
Hafnium Oxide ◽  
Gate Dielectrics ◽  
High K

scholarly journals Gate-tunable photodetector and ambipolar transistor implemented using a graphene/MoSe2 barristor

2021 ◽  
Vol 13 (1) ◽  
Author(s):  
Gwangtaek Oh ◽  
Ji Hoon Jeon ◽  
Young Chul Kim ◽  
Yeong Hwan Ahn ◽  
Bae Ho Park
Keyword(s):  
Gate Dielectric ◽  
Transition Metal Dichalcogenides ◽  
External Bias ◽  
High K ◽  
Ambipolar Behavior ◽  
Tuning Ratio ◽  
Metal Dichalcogenides ◽  
Lower Mobility ◽  
High Carrier Mobility ◽  
High Carrier

AbstractNext-generation electronic and optoelectronic devices require a high-quality channel layer. Graphene is a good candidate because of its high carrier mobility and unique ambipolar transport characteristics. However, the on/off ratio and photoresponsivity of graphene are typically low. Transition metal dichalcogenides (e.g., MoSe2) are semiconductors with high photoresponsivity but lower mobility than that of graphene. Here, we propose a graphene/MoSe2 barristor with a high-k ion-gel gate dielectric. It shows a high on/off ratio (3.3 × 104) and ambipolar behavior that is controlled by an external bias. The barristor exhibits very high external quantum efficiency (EQE, 66.3%) and photoresponsivity (285.0 mA/W). We demonstrate that an electric field applied to the gate electrode substantially modulates the photocurrent of the barristor, resulting in a high gate tuning ratio (1.50 μA/V). Therefore, this barristor shows potential for use as an ambipolar transistor with a high on/off ratio and a gate-tunable photodetector with a high EQE and responsivity.

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