Improved Heat Dissipation and Optical Performance of High-power LED Packaging with Sintered Nanosilver Die-attach Material

2010 ◽  
Vol 2010 (DPC) ◽  
pp. 001585-001605 ◽  
Author(s):  
Paul Panaccione ◽  
Tao Wang ◽  
Guo-Quan Lu ◽  
Xu Chen ◽  
Susan Luo

Heat removal in packaged high-power light-emitting diode (LED) chips is critical to device performance and reliability. Thermal performance of LEDs is important in that lowered junction temperatures extend the LED's lifetime at a given photometric flux (brightness). Optionally, lower thermal resistance can enable increased brightness operation without exceeding the maximum allowable Tj for a given lifetime. A significant portion of the junction-to-case thermal resistance comes from the joint between chip and substrate, or the die-attach layer. In this study, we evaluated three different types of leading die-attach materials; silver epoxy, lead-free solder, and an emerging nanosilver paste. Each of the three was processed via their respective physical and chemical mechanisms: epoxy curing by cross-linking of polymer molecules; intermetalic soldering by reflow and solidification; and nanosilver sintering by solid-state atomic diffusion. High-power LED chips with a chip area of 3.9 mm2 were attached by the three types of materials onto metalized aluminum nitride substrates, wire-bonded, and then tested in an electro-optical setup. The junction-to-heatsink thermal resistance of each LED assembly was determined by the wavelength shift methodology, described in detail in this paper. We found that the average thermal resistance in the chips attached by the nanosilver paste was the lowest, and it is the highest from the chips attached by the silver epoxy: the difference between the two was about 0.7°C/W, while the difference between the sintered and soldered was about 0.3°C/W. The lower thermal resistance in the sintered joints is expected to significantly improve the photometric flux from the device. Simple calculations, excluding high current efficiency droop, predict that the brightness improvement could be as high as 50% for the 3.9 mm2 chip. The samples will be functionally tested at high current, in both steady-state and pulsed operation, to determine brightness improvements, including the impact of droop. Nanosilver die-attach on a range of chip sizes up to 12 mm2 are also considered and discussed.

2010 ◽  
Vol 7 (3) ◽  
pp. 164-168 ◽  
Author(s):  
Paul Panaccione ◽  
Tao Wang ◽  
Xu Chen ◽  
Susan Luo ◽  
Guo-Quan Lu

Heat removal in packaged high-power light-emitting diode (LED) chips is critical to device performance and reliability. Thermal performance of LEDs is important in that lowered junction temperatures extend the LED's lifetime at a given pho-tometric flux (brightness). Optionally, lower thermal resistance can enable increased brightness operation without exceeding the maximum allowable Tj for a given lifetime. A significant portion of the junction-to-case thermal resistance comes from the joint between chip and substrate, or the die-attach layer. In this study, we evaluated three different types of leading die-attach materials; silver epoxy, lead-free solder, and an emerging nanosilver paste. Each of the three was processed via their respective physical and chemical mechanisms: epoxy curing by cross-linking of polymer molecules; intermetalic soldering by reflow and solidification; and nanosilver sintering by solid-state atomic diffusion. High-power LED chips with a range of chip areas from 3.9 mm2 to 9.0 mm2 were attached by the three types of materials onto metalized aluminum nitride substrates, wire-bonded, and then tested in an electro-optical setup. The junction-to-heatsink thermal resistance of each LED assembly was determined by the wavelength shift methodology. We found that the average thermal resistance in the chips attached by the nanosilver paste was the lowest, and it was highest from the chips attached by the silver epoxy. For the 3.9 mm2 die, the difference was about 0.6°C/W, while the difference between the sintered and soldered was about 0.3°C/W. The lower thermal resistance in the sintered joints is expected to significantly improve the photometric flux from the device. Simple calculations, excluding high current efficiency droop, predict that the brightness improvement could be as high as 50% for the 3.9 mm2 chip. The samples will be functionally tested at high current, in both steady-state and pulsed operation, to determine brightness improvements, including the impact of droop. Nanosilver die-attach on a range of chip sizes up to 12 mm2 are also considered and discussed.


2017 ◽  
Vol 2017 ◽  
pp. 1-8 ◽  
Author(s):  
Piaopiao He ◽  
Jinlong Zhang ◽  
Jianhua Zhang ◽  
Luqiao Yin

The reliability of high-power light-emitting-diode (LED) devices strongly depends on the die-attach quality because voids may increase junction temperature and total thermal resistance of LED devices. Die-attach material has a key role in the thermal management of high-power LED package by providing low-contact thermal resistance. Thermal and mechanical analyses were carried out by experiments and thermal simulation. The quantitative analysis results show that thermal resistance of die-attach layer (thermal resistance caused by die-attach material and voids in die-attach layer) plays an important role in total thermal resistance of high-power LED packaging according to the differential structure function of thermal transient characteristics. The increase of void fraction in die-attach layer causes the increases of thermal resistance of die-attach layer; the thermal resistance increased by 1.95 K/W when the void fraction increased to 62.45%. The voids also make an obvious influence on thermal stress and thermal strain of chip; the biggest thermal stress of chip was as high as 847.1 MPa compared to the 565.2 MPa when the void fraction increases from being void-free to 30% in the die-attach layer.


2016 ◽  
Vol 853 ◽  
pp. 389-393 ◽  
Author(s):  
Jia Chen ◽  
Xin Li ◽  
Ya Fei Kong

Along with the increasing demand of high power LED (>1W), multi-chip modules have made great progress to an inevitable trend. Thus, large packaging area is needed to dissipate heat efficiently. In other words, only when we find appropriate packaging materials to control the junction temperature well, can we achieve high-power LED devices in smaller packaging area. Obviously, a die-attach layer as the first-level packaging has a most significant impact on the thermal performance of a power module. So we introduce a novel die-attach material, nanosilver paste, which can be used for connecting multi-chips on the substrate because of its higher melting temperature and better thermal/electrical conductivity than conventional solders and adhesive films. What is more important, because of their ability to emit high brightness, LED packages are being exploited for other systems or fields, and in most cases are exposed to harsher environments. Therefore, the performance and stability of LED packages will be the key to assuring the reliable function of systems. So, in this paper, the optical and electrical properties of the LED device operating under various ambient temperatures from 27 to 120°C were determined. The test results showed that nanosilver paste was a very promising die-attach material in high power multi-chip modules packaging.


2010 ◽  
Vol 132 (3) ◽  
Author(s):  
Xin Li ◽  
Xu Chen ◽  
Guo-Quan Lu

As a solid electroluminescent source, white light emitting diode (LED) has entered a practical stage and become an alternative to replace incandescent and fluorescent light sources. However, due to the increasing integration and miniaturization of LED chips, heat flux inside the chip is also increasing, which puts the packaging into the position to meet higher requirements of heat dissipation. In this study, a new interconnection material—nanosilver paste is used for the LED chip packaging to pursue a better optical performance, since high thermal conductivity of this material can help improve the efficiency of heat dissipation for the LED chip. The bonding ability of this new die-attach material is evaluated by their bonding strength. Moreover, high-power LED modules connected with nanosilver paste, Sn3Ag0.5Cu solder, and silver epoxy are aged under hygrothermal aging and temperature cycling tests. The performances of these LED modules are tested at different aging time. The results show that LED modules sintered with nanosilver paste have the best performance and stability.


2016 ◽  
Vol 37 (9) ◽  
pp. 1159-1165
Author(s):  
陈佳 CHEN Jia ◽  
李欣 LI Xin ◽  
孔亚飞 KONG Ya-fei ◽  
梅云辉 MEI Yun-hui ◽  
陆国权 LU Guo-quan

2013 ◽  
Vol 462-463 ◽  
pp. 678-682
Author(s):  
Yue Zong Zhang ◽  
Chun Xia Li ◽  
Wen Bin Zhang

The paper is studied on the performances of low power light-emitting diode and high power LED under high-current. After observing and measuring the degeneration of them, the Analysis of the failure mechanism is given. The degenerations of the optical parameter, electronic parameter and thermal parameter of high power LED under 600mA current stress are measured and the failure mechanism is analyzed. The I-V characteristic curve proves that the degeneration is happened in active region. Under high-current stress, the active region of high power LED is ageing which leads to much more defects. The degenerations of pins on the resin package, metal wire and surface layer metal pads are found with scanning electron microscope.


2012 ◽  
Vol 4 ◽  
pp. 153-160
Author(s):  
De Huai Zeng ◽  
Yuan Liu ◽  
Li Li ◽  
De Gui Yu ◽  
Gang Xu

With the development of high power LED technology, junction temperature as a key factor constrains the performance and the service life of LED, and the main parameter of junction temperature is thermal resistance. Therefore, how to measure the thermal resistance of high power LED quickly and accurately plays an important part in improving the performance and the service life of LED. In this paper the accurate and fast measurement equipment was applied to study the thermal characteristics of high power LED. The forward-voltage based method was conducted to measure the junction temperature of high power. Then, support vector regression (SVR) combined with genetic algorithm (GA) for its parameter optimization, was proposed to establish a model to predict the thermal resistance of high power LED. The prediction performance of GA-SVR was compared with those of BPNN model. The result demonstrated that the estimated errors GA-SVR models, such as Mean Absolute Relative Error (MARE) and Root Mean Squared Errors (RMSE), all are smaller than those achieved by the BPNN applying identical samples.


2015 ◽  
Vol 62 (11) ◽  
pp. 3715-3721 ◽  
Author(s):  
Wei Lai ◽  
Xianming Liu ◽  
Weimin Chen ◽  
Xiaohua Lei ◽  
Xueying Cao

2006 ◽  
Vol 326-328 ◽  
pp. 309-312 ◽  
Author(s):  
Sung Jun Lee ◽  
Ji Hyun Park ◽  
Chang Hyun Lim ◽  
Won Kyu Jeong ◽  
Seog Moon Choi ◽  
...  

By the development of high power LED for solid states lighting, the requirement for driving current has increased critically, thereby increasing power dissipation. Heat flux corresponds to power dissipation is mainly generated in p-n junction of LED, so the effective removal of heat is the key factor for long lifetime of LED chip. In this study, we newly proposed the silicon package for high power LED using MEMS technology and estimated its heat dissipation characteristic. Our silicon package structure is composed of base and reflector cup. The role of base is that settle LED chip at desired position and supply electrical interconnection for LED operation, and finally transfer the heat from junction region to outside. For improved heat transfer, we introduced the heat conductive metal plated trench structure at the opposite side of LED attached side. The depth and the diameter of trench were 150 and 100um, respectively. Copper with high thermal conductivity than silicon was filled in trench by electroplating and the thickness of copper was about 100um. Reflector cup was formed by anisotropic wet etching and then, silicon package platform could be fabricated by eutectic bonding between base and reflector cup. The thermal resistance of silicon package was about 6 to 7K/W from junction to case, and also, thermal resistance reduction of 0.64K/W was done by metal plated trench. This result could be comparable to that of other high power LED package. Our silicon package platform is easy to be expanded into array and wafer level package. So, it is suitable for future high efficiency and low cost package.


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