Design, Fabrication, Electrical Characterization and Reliability of Nanomaterials Based Embedded Passives

2010 ◽  
Vol 2010 (1) ◽  
pp. 000847-000854 ◽  
Author(s):  
Rabindra N. Das ◽  
John M. Lauffer ◽  
Steven G. Rosser ◽  
Mark D. Poliks ◽  
Voya R. Markovich

This paper discusses thin film technology based on barium titanate (BaTiO3)-epoxy polymer nanocomposites. In particular, we highlight recent developments on high capacitance, large area, thin film passives and their integration in System in a Package (SiP). A variety of nanocomposite thin films ranging from 2 microns to 25 microns thick were processed on PWB substrates by liquid coating or printing processes. SEM micrographs showed uniform particle distribution in the coatings. The electrical performance of composites was characterized by dielectric constant (Dk), capacitance and dissipation factor (loss) measurements. We have designed and fabricated several printed wiring board (PWB) and flip-chip package test vehicles focusing on resistors and capacitors. Two basic capacitor cores were used for this study. One is a layer capacitor. The second capacitor in this case study was discrete capacitor. Resin Coated Copper Capacitive (RC3) nanocomposites were used to fabricate 35 mm substrates with a two by two array of 15mm square isolated epoxy based regions; each having two to six RC3 based embedded capacitance layers. Cores are showing high capacitance density ranging from 15 nF to 30nF depending on Cu area, composition and thickness of the capacitors. In another design, we have used eight layer high density internal core and subsequent fine geometry n (1 to 3) buildup layers to form a n-8-n structure. The eight layer internal core has two resistance layers in the middle and 2 to 6 capacitance layer sequentially applied on the surface. The study also evaluates the resistor materials for embedded passives. Resistors are carbon based pastes and metal based alloys NiCrAlSi. Embedded resistor technology can use either thin film materials, that are applied on the copper foil, or screened carbon based resistor pastes that can achieve any resistor value at any level. For example, combination of 25 ohm per square material and 250 ohm per square material enables resistor ranges from 15 ohms through 30,000 ohms with efficient sizes for the embedded resistors. Similarly, printable resistors can be designed to cover the resistance in the range of 5 ohms to 1 Mohm. The embedded resistors can be laser trimmed to a tolerance of <5% for applications that require tighter tolerance. Reliability of the test vehicles was ascertained by IR-reflow, thermal cycling, PCT (Pressure Cooker Test ) and solder shock. Embedded discrete capacitors were stable after PCT and solder shock. Capacitance change was less than 5% after IR reflow (assembly) preconditioning (3X, 245 °C) and 1400 cycles DTC (Deep Thermal Cycle).

2011 ◽  
Vol 2011 (DPC) ◽  
pp. 002011-002050
Author(s):  
Rabindra N. Das ◽  
Konstantinos I. Papathomas ◽  
John M. Lauffer ◽  
Mark D. Poliks ◽  
Voya R. Markovich

Passives account for a very large part of today's electronic assemblies. This is particularly true for digital products such as cellular phones, camcorders, computers and several critical defense devices. This paper presents an entire process from design and fabrication to electrical characterization and reliability test of embedded passives on organic multilayered substrates. A variety of thin film capacitor and resistors were utilized to manufacture high-performance embedded passives. The electrical properties of capacitors fabricated from polymer-ceramic nanocomposites showed a stable capacitance and low loss over a wide temperature range. We have designed and fabricated several printed wiring board (PWB) and flip-chip package test vehicles focusing on resistors and capacitors. Two basic capacitor cores were used for this study. One is a layer capacitor. The second capacitor in this case study was discrete capacitor. In both cases, capacitance values are defined by the feature size, thickness and dielectric constant of the polymer-ceramic compositions. Nanocomposite can be directly deposited either by liquid coating or screen printing. Alternatively, nanocomposite thin films can be laminated and capacitor laminate can be used as the base substrate for subsequent build-up processing. For example, Resin Coated Copper Capacitive (RC3) nanocomposites were used to fabricate 35 mm substrates with a two by two array of 15mm square isolated epoxy based regions; each having two to six RC3 based embedded capacitance layers. The capacitor fabrication is based on a sequential build-up technology employing a first patternable electrode. After patterning of the electrode, RC3 nanocomposite can be laminated within PCB. Embedded passive cores are showing high capacitance density ranging from 15 nF to 30nF depending on Cu area, composition and thickness of the capacitors. Reliability of the capacitors was ascertained by IR-reflow, thermal cycling, PCT (Pressure Cooker Test ) and solder shock. Embedded capacitors were stable after PCT and solder shock. Capacitance change was less than 5% after IR reflow (assembly) preconditioning (3X, 245 °C) and 1000 cycles DTC (Deep Thermal Cycle).


Author(s):  
Don Schatzel

Miniaturization of electronic packages will play a key role in future space avionics systems. Smaller avionics packages will reduce payloads while providing greater functionality for information processing and mission instrumentation. Current surface mount technology discrete passive devices not only take up significant space but also add weight. To that end, the use of embedded passive devices, such as capacitors, inductors and resistors will be instrumental in allowing electronics to be made smaller and lighter. Embedded passive devices fabricated on silicon or like substrates using thin film technology, promise great savings in circuit volume, as well as potentially improving electrical performance by decreasing parasitic losses. These devices exhibit a low physical profile and allow the circuit footprint to be reduced by stacking passive elements within a substrate. Thin film technologies used to deposit embedded passive devices are improving and costs associated with the process are decreasing. There are still many challenges with regard to this approach that must be overcome. In order to become a viable approach these devices need to work in conjunction with other active devices such as bumped die (flip chip) that share the same substrate area. This dictates that the embedded passive devices are resistant to the subsequent assembly processes associated with die attach (temperature, pressure). Bare die will need to be mounted directly on top of one or more layers of embedded passive devices. Currently there is not an abundant amount of information available on the reliability of these devices when subjected to the high temperatures of die attach or environmental thermal cycling for space environments. Device performance must be consistent over time and temperature with minimal parasitic loss. Pretested and assembled silicon substrates with layers of embedded capacitors made with two different dielectric materials, Ta2O5 (Tantalum Oxide) and benzocyclobutene (BCB), were subjected to the die attach process and tested for performance in an ambient environment. These assemblies were subjected to environmental thermal cycling from −55°C to 100°C. Preliminary results indicate embedded passive capacitors and resistors can fulfill the performance and reliability requirements of space flight on future missions. Testing results are encouraging for continued development of integrating embedded passive devices to replace conventional electronic packaging methods.


2020 ◽  
Vol 91 (3) ◽  
pp. 30201
Author(s):  
Hang Yu ◽  
Jianlin Zhou ◽  
Yuanyuan Hao ◽  
Yao Ni

Organic thin film transistors (OTFTs) based on dioctylbenzothienobenzothiophene (C8BTBT) and copper (Cu) electrodes were fabricated. For improving the electrical performance of the original devices, the different modifications were attempted to insert in three different positions including semiconductor/electrode interface, semiconductor bulk inside and semiconductor/insulator interface. In detail, 4,4′,4′′-tris[3-methylpheny(phenyl)amino] triphenylamine (m-MTDATA) was applied between C8BTBTand Cu electrodes as hole injection layer (HIL). Moreover, the fluorinated copper phthalo-cyanine (F16CuPc) was inserted in C8BTBT/SiO2 interface to form F16CuPc/C8BTBT heterojunction or C8BTBT bulk to form C8BTBT/F16CuPc/C8BTBT sandwich configuration. Our experiment shows that, the sandwich structured OTFTs have a significant performance enhancement when appropriate thickness modification is chosen, comparing with original C8BTBT devices. Then, even the low work function metal Cu was applied, a normal p-type operate-mode C8BTBT-OTFT with mobility as high as 2.56 cm2/Vs has been fabricated.


2003 ◽  
Vol 771 ◽  
Author(s):  
Michael C. Hamilton ◽  
Sandrine Martin ◽  
Jerzy Kanicki

AbstractWe have investigated the effects of white-light illumination on the electrical performance of organic polymer thin-film transistors (OP-TFTs). The OFF-state drain current is significantly increased, while the drain current in the strong accumulation regime is relatively unaffected. At the same time, the threshold voltage is decreased and the subthreshold slope is increased, while the field-effect mobility of the charge carriers is not affected. The observed effects are explained in terms of the photogeneration of free charge carriers in the channel region due to the absorbed photons.


2021 ◽  
Vol 42 (4) ◽  
pp. 529-532
Author(s):  
Zhendong Wu ◽  
Hengbo Zhang ◽  
Xiaolong Wang ◽  
Weisong Zhou ◽  
Lingyan Liang ◽  
...  

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