PWB Base Materials. (13). Materials of Multilayer Printed Circuit Board-Prepreg, Core.

Author(s):  
Yasunobu SHIGAKI
2021 ◽  
Author(s):  
Brian Gray

The restriction of lead in solder has caused a change in base materials used to make electronics—the result of which has been a new failure mode known as pad-crater. The susceptibility of six commercially available printed circuit board (PCB) laminates to pad-crater by spherical bend test was determined. The correlation of PCB laminate tensile properties, Vicker’s hardness (VH) of the resin, and weave dimensions showed an inverse relation between susceptibility to pad-crater and VH. Spherical bend testing of pure G10 laminate showed the orthotropic nature of laminates must be accounted for when modeling spherical bend. Comparison of bare PCB spherical bend test results showed the warp and weft direction have different strain responses for some materials. Comparison of strain energy of printed circuit board assemblies and bare PCB subjected to spherical bend showed the additional stiffness added by the ball grid array is almost identical for PCB laminates with different tensile properties.


2021 ◽  
Author(s):  
Brian Gray

The restriction of lead in solder has caused a change in base materials used to make electronics—the result of which has been a new failure mode known as pad-crater. The susceptibility of six commercially available printed circuit board (PCB) laminates to pad-crater by spherical bend test was determined. The correlation of PCB laminate tensile properties, Vicker’s hardness (VH) of the resin, and weave dimensions showed an inverse relation between susceptibility to pad-crater and VH. Spherical bend testing of pure G10 laminate showed the orthotropic nature of laminates must be accounted for when modeling spherical bend. Comparison of bare PCB spherical bend test results showed the warp and weft direction have different strain responses for some materials. Comparison of strain energy of printed circuit board assemblies and bare PCB subjected to spherical bend showed the additional stiffness added by the ball grid array is almost identical for PCB laminates with different tensile properties.


2012 ◽  
Vol 132 (6) ◽  
pp. 404-410 ◽  
Author(s):  
Kenichi Nakayama ◽  
Kenichi Kagoshima ◽  
Shigeki Takeda

2014 ◽  
Vol 5 (1) ◽  
pp. 737-741
Author(s):  
Alejandro Dueñas Jiménez ◽  
Francisco Jiménez Hernández

Because of the high volume of processing, transmission, and information storage, electronic systems presently requires faster clock speeds tosynchronizethe integrated circuits. Presently the “speeds” on the connections of a printed circuit board (PCB) are in the order of the GHz. At these frequencies the behavior of the interconnects are more like that of a transmission line, and hence distortion, delay, and phase shift- effects caused by phenomena like cross talk, ringing and over shot are present and may be undesirable for the performance of a circuit or system.Some of these phrases were extracted from the chapter eight of book “2-D Electromagnetic Simulation of Passive Microstrip Circuits” from the corresponding author of this paper.


Author(s):  
Prabjit Singh ◽  
Ying Yu ◽  
Robert E. Davis

Abstract A land-grid array connector, electrically connecting an array of plated contact pads on a ceramic substrate chip carrier to plated contact pads on a printed circuit board (PCB), failed in a year after assembly due to time-delayed fracture of multiple C-shaped spring connectors. The land-grid-array connectors analyzed had arrays of connectors consisting of gold on nickel plated Be-Cu C-shaped springs in compression that made electrical connections between the pads on the ceramic substrates and the PCBs. Metallography, fractography and surface analyses revealed the root cause of the C-spring connector fracture to be plating solutions trapped in deep grain boundary grooves etched into the C-spring connectors during the pre-plating cleaning operation. The stress necessary for the stress corrosion cracking mechanism was provided by the C-spring connectors, in the land-grid array, being compressed between the ceramic substrate and the printed circuit board.


Author(s):  
William Ng ◽  
Kevin Weaver ◽  
Zachary Gemmill ◽  
Herve Deslandes ◽  
Rudolf Schlangen

Abstract This paper demonstrates the use of a real time lock-in thermography (LIT) system to non-destructively characterize thermal events prior to the failing of an integrated circuit (IC) device. A case study using a packaged IC mounted on printed circuit board (PCB) is presented. The result validated the failing model by observing the thermal signature on the package. Subsequent analysis from the backside of the IC identified a hot spot in internal circuitry sensitive to varying value of external discrete component (inductor) on PCB.


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