scholarly journals Piscivorous Bird Deterrent Device Based on a Direct Digital Synthesis of Acoustic Signals

2021 ◽  
Vol 27 (6) ◽  
pp. 42-48
Author(s):  
Arturs Aboltins ◽  
Dmitrijs Pikulins ◽  
Juris Grizans ◽  
Sergejs Tjukovs

This paper addresses the development of an acoustic deterrent device for the protection of fishponds and other objects against the unwanted presence of birds. The objective of the paper is not only providing of a deep analysis of available technologies for waveform synthesis and generation, but also building a theoretical base for the design and implementation of acoustic bird deterrent solutions. The paper addresses the synthesis of bird songs and calls using technologies for music, speech, and other types of acoustic signal processing. The second part of the paper is devoted to the unique algorithms and implementation details of the intelligent acoustic deterrence device prototype. The practical applicability of algorithms for bird call record conversion into synthesizer sequences has been analysed and possible issues are highlighted. The effectiveness and ease of practical implementation of the given method in the hardware are briefly discussed.

Author(s):  
Manoj Kollam

This paper deals with the design & implementation of a Digital Modulator based on the FPGA. The design is implemented using the Enhanced Direct Digital Synthesis (DDS) Technology. The basic DDS architecture is enhanced with the minimum hardware to facilitate the complete system level support for different kinds of Modulations with minimal FPGA resources. The size of the ROM look up is reduced by using the mapping logic. The Design meets the present Software Define Radio (SDR) requirements and provides the user selection for desired modulation technique to be used. The VHDL programming language is used for modeling the hardware blocks for powerful and flexible programming and to avoid VHDL code generation tools. The design is simulated in the Model Sim Simulation Tool and Synthesized using the Xilinx ISE Synthesis Tool. The architecture is implemented on the SPARTAN-3A FPGA from Xilinx Family in the SPARTAN-3A evaluation board. The experimental results obtained demonstrate the usefulness of the proposed system in terms of the system resources, its capabilities for design, validation and practical implementation purposes.


2013 ◽  
Vol 380-384 ◽  
pp. 3643-3647
Author(s):  
Hong He ◽  
Jin Zhou Zhang ◽  
Zhi Hong Zhang

A signal generator with adjustable frequency, phase and duty cycle is designed in this paper. The design of this signal generator is based on the technology of direct digital synthesis (DDS).The classic structure of DDS is presented and its principles are introduced in detail. The key modules of the design such as phase accumulator and pulse width processing are implemented by verilog HDL language. With suitable FPGA, the designed signal generator and all modules of the design are simulated successfully in Quartus II.


2014 ◽  
Vol 614 ◽  
pp. 356-362 ◽  
Author(s):  
Rui Li ◽  
Yuan Long Cai ◽  
Xin Bei Bai ◽  
Ming Quan Lu

A method to simulate the Doppler frequency shift of high dynamic signals of Global Navigation Satellite Systems (GNSS) is provided in this paper. The methodology of the method based on third-order Direct Digital Synthesis (DDS) is introduced and the efficient implementation architecture is proposed. The design criteria of the DDS are investigated according to the precision and dynamic range of the Doppler shift. The simulation results are also demonstrated, which indicate that the method is available for the high precision Doppler shift simulation of GNSS signals.


2012 ◽  
Vol 198-199 ◽  
pp. 948-953
Author(s):  
Jian Ping Ou ◽  
Sheng Qi Liu ◽  
Wei Niu

An implementation framework of stepped-frequency LFM (SF-LFM) radar echoes simulator is presented in the paper based on the decomposition and calculation of SF-LFM radar echoes of a moving target. The proposed method can be implemented conveniently with direct digital synthesis (DDS) logic resource. The feasibility of this resolution is verified with computer and semi-physical simulations experiments.


Author(s):  
Harsh Goud ◽  
Pankaj Swarnkar

AbstractModelling and controlling of Continuous stirred tank reactor (CSTR) is one of the major problems in the process industry. The nonlinear characteristic of CSTR may change the variation of temperature in either direction from the given set value. Chemical reactions within the CSTR depends on the given reference temperature. Such variation from reference values may result in degrading the variety of biomass. Design and implementation of the precise control device in such system are difficult for researchers. This paper proposes the MIT based control scheme as a solution to control problem of CSTR. An improvement of signal synthesis MIT system has been proposed in this study to enhance the steady-state and transient performance of CSTR. Artificial Bee Colony (ABC) based controller parameter tuning technique is applied to get the optimal performance of the controller. This paper shows the design and implementation of conventional PID tuned with the Z-N method, adaptive PID tune with ABC, MIT and ABC-MIT for CSTR. Detailed comparison based on simulation studies is presented which shows that ABC-MIT based control scheme improves the transient and steady state response.


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