Plan-View and Cross-Sectional Photoluminescence Imaging Analyses of Threading Dislocations in 4H-SiC Epilayers

2013 ◽  
Vol 52 (4S) ◽  
pp. 04CP09 ◽  
Author(s):  
Masahiro Nagano ◽  
Isaho Kamata ◽  
Hidekazu Tsuchida
Keyword(s):  
Threading Dislocations ◽  
Cross Sectional ◽  
Plan View

Defect Characterization of InAs Films Grown by Two-Step MOCVD on (100) InP Substrates

1992 ◽  
Vol 280 ◽  
Author(s):  
A. K. Ballal ◽  
L. Salamanca-Riba ◽  
D. L. Partin
Keyword(s):  
Electron Microscopy ◽  
Lattice Mismatch ◽  
Misfit Strain ◽  
Organic Chemical ◽  
Threading Dislocations ◽  
Misfit Dislocations ◽  
Epitaxial Relationship ◽  
Cross Sectional ◽  
Plan View ◽  
Inp Substrates

ABSTRACTIn this paper we investigate the defect morphology and misfit strain in InAs films grown on (100) InP substrates using two-step metal organic chemical vapor deposition (MOCVD). High quality InAs films were obtained despite the 3.2% lattice-mismatch between the InAs film and the InP substrate. Cross-sectional and plan-view transmission electron microscopy has been used to characterize the ∼3μm thick InAs films. Almost all the lattice mismatch is accomodated by an orthogonal array of pure edge Lomer dislocations which are favored over the 60° type since they are more efficient in relieving misfit strain. In addition to misfit dislocations, threading dislocations were observed propagating through the film. Most of the threading dislocations were 60° type dislocations along the < 211 > and < 110 > directions on inclined {111} planes. The threading dislocations originate from island coalescence during film growth. High resolution electron microscopy shows the epitaxial relationship between the film and the substrate and reveals an abrupt and sharp interface with periodic dislocation cores.

Two-step Defect Reduction of GaAs/Si Epitaxy by Selective Aspect Ratio Trapping

2007 ◽  
Vol 1030 ◽  
Author(s):  
Jizhong Li ◽  
J. Bai ◽  
C. Major ◽  
M. Carroll ◽  
A. Lochtefeld ◽  
...  
Keyword(s):  
Aspect Ratio ◽  
Defect Formation ◽  
Lattice Mismatch ◽  
Defect Density ◽  
Layer Growth ◽  
Threading Dislocations ◽  
Cross Sectional ◽  
Defect Reduction ◽  
Plan View ◽  
Step Defect

AbstractWe report on the MOCVD growth of GaAs on patterned Si utilizing the Aspect Ratio Trapping (ART) method to reduce threading dislocations resulting from lattice mismatch. Defect-free GaAs was obtained from growth in sub-micron trenches formed in SiO2 on Si (001) substrates. Material quality has been characterized by cross-sectional and plan-view TEM and XRD. It was found that when growing GaAs above the trenched region, coalescence-induced threading dislocations (TDs) and planar defects were introduced at the coalescence junction interfaces. These defects were found to be unrelated to the misfit defects (MDs) on GaAs/Si interface that originated during initial epitaxial growth. Causes of coalescence defect formation were experimentally investigated by employing a two-step defect reduction scheme. It is concluded that by further optimizing growth conditions during coalesce layer growth, low defect-density GaAs material can be obtained on Si substrate.

scholarly journals Can Laterally Overgrown GaN Layers be free of Structural Defects?

2000 ◽  
Vol 639 ◽  
Author(s):  
D. Cherns ◽  
Z. Liliental-Weber
Keyword(s):  
Large Angle ◽  
Convergent Beam Electron Diffraction ◽  
Structural Defects ◽  
Shear Stresses ◽  
Threading Dislocations ◽  
Cross Sectional ◽  
Plan View ◽  
Transmission Electron ◽  
Half Loop ◽  
Convergent Beam

ABSTRACTTransmission electron microscopy has been used to examine dislocations present in an epitaxial laterally overgrown (ELOG) sample of GaN grown on (0001)sapphire. Studies of both plan-view and cross-sectional samples revealed arrays of dislocations present in the (11-20) boundary between the seed and the wing (overgrown) material and at the meeting front between adjacent wings, as well as dislocations in the form of half-loops extending into the wing regions. Both the boundary and half-loop dislocations had 1/3<11-20> Burgers vectors which were either perpendicular (boundary dislocations) or at 30°s (half-loops) to the boundary plane. Large angle convergent beam electron diffraction was used to show that the boundary dislocations and halfloops correlated respectively with tilts and twists of the wing material about (11-20). A model is proposed whereby the half-loops are generated from threading dislocations by shear stresses acting along the stripe direction. The origin, and elimination, of these stresses is discussed.

The reaction of amorphous Ni-Nb films with Si in the presence of a native SiO2 layer

1990 ◽  
Vol 48 (4) ◽  
pp. 664-665
Author(s):  
N. Rozhanski ◽  
A. Barg
Keyword(s):  
High Temperature ◽  
Crystallization Temperature ◽  
Diffusion Barriers ◽  
Sio2 Layer ◽  
Si Substrate ◽  
Cross Sectional ◽  
Plan View ◽  
Temperature Range ◽  
Sputter Deposited

Amorphous Ni-Nb alloys are of potential interest as diffusion barriers for high temperature metallization for VLSI. In the present work amorphous Ni-Nb films were sputter deposited on Si(100) and their interaction with a substrate was studied in the temperature range (200-700)°C. The crystallization of films was observed on the plan-view specimens heated in-situ in Philips-400ST microscope. Cross-sectional objects were prepared to study the structure of interfaces.The crystallization temperature of Ni5 0 Ni5 0 and Ni8 0 Nb2 0 films was found to be equal to 675°C and 525°C correspondingly. The crystallization of Ni5 0 Ni5 0 films is followed by the formation of Ni6Nb7 and Ni3Nb nucleus. Ni8 0Nb2 0 films crystallise with the formation of Ni and Ni3Nb crystals. No interaction of both films with Si substrate was observed on plan-view specimens up to 700°C, that is due to the barrier action of the native SiO2 layer.

Identification of Root Cause Failure in Silicon on Insulator Body Contacted nFETs Using Scanning Capacitance Microscopy and Scanning Spreading Resistance Microscopy

2006 ◽  
Author(s):  
J.S. McMurray ◽  
C.M. Molella
Keyword(s):  
The Body ◽  
Silicon On Insulator ◽  
Back Side ◽  
Cross Sectional ◽  
Plan View ◽  
Spreading Resistance ◽  
Scanning Capacitance Microscopy ◽  
Root Cause ◽  
Cross Sectional Imaging ◽  
Active Channel

Abstract Root cause for failure of 90 nm body contacted nFETs was identified using scanning capacitance microscopy (SCM) and scanning spreading resistance microscopy (SSRM). The failure mechanism was identified using both cross sectional imaging and imaging of the active silicon - buried oxide (BOX) interface in plan view. This is the first report of back-side plan view SCM and SSRM data for SOI devices. This unique plan view shows the root cause for the failure is an under doped link up region between the body contacts and the active channel of the device.

A New Method of Wafer Level Plan View TEM Sample Preparation by DualBeam

2008 ◽  
Author(s):  
Hyoung H. Kang ◽  
Michael A. Gribelyuk ◽  
Oliver D. Patterson ◽  
Steven B. Herschbein ◽  
Corey Senowitz
Keyword(s):  
Sample Preparation ◽  
Ex Situ ◽  
Wafer Level ◽  
Cross Sectional ◽  
Plan View ◽  
Manufacturing Line ◽  
Transmission Electron ◽  
Thin Lamella ◽  
Preparation Techniques

Abstract Cross-sectional style transmission electron microscopy (TEM) sample preparation techniques by DualBeam (SEM/FIB) systems are widely used in both laboratory and manufacturing lines with either in-situ or ex-situ lift out methods. By contrast, however, the plan view TEM sample has only been prepared in the laboratory environment, and only after breaking the wafer. This paper introduces a novel methodology for in-line, plan view TEM sample preparation at the 300mm wafer level that does not require breaking the wafer. It also presents the benefit of the technique on electrically short defects. The methodology of thin lamella TEM sample preparation for plan view work in two different tool configurations is also presented. The detailed procedure of thin lamella sample preparation is also described. In-line, full wafer plan view (S)TEM provides a quick turn around solution for defect analysis in the manufacturing line.

Development of High-Performance GaAs Solar Cells on Large-Grain Polycrystalline Ge Substrates

1995 ◽  
Vol 403 ◽  
Author(s):  
R. Venkatasubramanian ◽  
B. O'Quinn ◽  
J. S. Hills ◽  
M. L. Timmons ◽  
D. P. Malta
Keyword(s):  
Solar Cells ◽  
High Performance ◽  
Carrier Lifetime ◽  
Minority Carrier ◽  
Minority Carrier Lifetime ◽  
Cross Sectional ◽  
Plan View ◽  
Electron Beam Induced Current ◽  
Induced Defects

AbstractThe characterization of MOCVD-grown GaAs-AlGaAs materials and GaAs p+n junctions on poly-Ge substrates is presented. Minority carrier lifetime in GaAs-AIGaAs double-hetero (DH) structures grown on these substrates and the variation of lifetimes across different grainstructures are discussed. Minority-carrier diffusion lengths in polycrystalline GaAs p+-n junctions were evaluated by cross-sectional electron-beam induced current (EBIC) scans. The junctions were also studied by plan-view EBIC imaging. Optimization studies of GaAs solar cell on poly-Ge are discussed briefly. The effect of various polycrystalline substrate-induced defects on performance of GaAs solar cells are presented.

Direct Deposition Reactions Between Nickel and Silicon Substrates

1993 ◽  
Vol 311 ◽  
Author(s):  
Lin Zhang ◽  
Douglas G. Ivey
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Silicon Substrates ◽  
Silicide Formation ◽  
Cross Sectional ◽  
Deposition Rates ◽  
Plan View ◽  
X Ray ◽  
Si Substrates ◽  
Transmission Electron

ABSTRACTSilicide formation through deposition of Ni onto hot Si substrates has been investigated. Ni was deposited onto <100> oriented Si wafers, which were heated up to 300°C, by e-beam evaporation under a vacuum of <2x10-6 Torr. The deposition rates were varied from 0.1 nm/s to 6 nm/s. The samples were then examined by both cross sectional and plan view transmission electron microscopy (TEM), energy dispersive x-ray spectroscopy and electron diffraction. The experimental results are discussed in terms of a new kinetic model.

Tem Specimen Preparation for Display Materials of Vacuum Fluorescent Displays

1998 ◽  
Vol 4 (S2) ◽  
pp. 870-871
Author(s):  
T. Dolukhanyan ◽  
C. Sung ◽  
S. Ahn ◽  
J. Lee
Keyword(s):  
Bulk Material ◽  
Low Cost ◽  
High Yield ◽  
Specimen Preparation ◽  
List Type ◽  
Ion Milling ◽  
Cross Sectional ◽  
Preparation Methods ◽  
Plan View ◽  
Submicron Scale

Further development of Vacuum Fluorescent Displays (Fig.l) for low cost production and high yield requires investigation of all the components on a submicron scale at various processing stages.A variety of specimen preparation methods have been used for making different types of high quality cross-sectional and plan-view TEM specimens from:1.Initial phosphor materials - ZnCdS powders admixed with conducting powder of ln2O3;2.In2O3 mixed ZnCdS phosphor layers of ready-made working VFD;3.W - filament cathodes coated with (Ba,Sr,Ca) oxides.Rapid sharing of results.Group 1 specimens were made both by direct dispersion of phosphor powder particles on the carbon coated copper grid from acetone diluted powder suspension, and by preparation of cured bulk material from the powder using Gatan G-l epoxy, followed by cutting, grinding-dimpling and final ion milling in Gatan DuoMill 600 (Fig.2).

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