scholarly journals High Efficiency Ka-Band Spatial Combiner

2014 ◽  
Vol 3 (2) ◽  
pp. 10 ◽  
Author(s):  
D. Passi ◽  
A. Leggieri ◽  
F. Di Paolo ◽  
M. Bartocci ◽  
A. Tafuto ◽  
...  

A Ka-Band, High Efficiency, Small Size Spatial Combiner (SPC) is proposed in this paper, which uses an innovatively matched quadruple Fin Lines to microstrip (FLuS) transitions. At the date of this paper and at the Author's best knowledge no such FLuS innovative transitions have been reported in literature before. These transitions are inserted into a WR28 waveguide T-junction, in order to allow the integration of 16 Monolithic Microwave Integrated Circuit (MMIC) Solid State Power Amplifiers (SSPA's). A computational electromagnetic model using the finite elements method has been implemented. A mean insertion loss of 2 dB is achieved with a return loss better the 10 dB in the 31-37 GHz bandwidth.

2017 ◽  
Vol 2017 (NOR) ◽  
pp. 1-4
Author(s):  
Ahmed Hassona ◽  
Zhongxia Simon He ◽  
Vessen Vassilev ◽  
Herbert Zirath

Abstract In this work, an on-chip Monolithic Microwave Integrated Circuit (MMIC) to waveguide transition is realized based on Linearly Tapered Slot antenna (LTSA) structure. The antenna is implemented on a 50-um-thick Gallium Arsenide (GaAs) substrate and placed in the E-plane of an air-filled D-band waveguide. The transition shows a maximum insertion loss of 1 dB across the frequency range 110–170 GHz. The average return loss of the transition is −15 dB and the minimum is −9 dB. The structure occupies an area of 0.82×0.6 mm2. The transition provides low-loss wide-band connectivity for millimeter-wave systems and addresses integration challenges facing systems operating beyond 100 GHz.


2019 ◽  
Vol 5 (1) ◽  
pp. 24-30
Author(s):  
Rizqi Eka Putri ◽  
Emerson Pascawira Sinulingga ◽  
Suherman Suherman

Electromagnetic modeling technique on monolithic microwave integrated circuit (MMIC) coplanar waveguide (CPW) multilayer have been developed to accurately model the Parallel Coupled-Line Bandpass Filter. The 3D modeling technique shows the simulation results that are optimum. Several simulation steps have been demonstrated and compared on the design of Parallel Coupled-Line Bandpass Filters. Based on the 3D modeling, S11-Return Loss and S21-Insertion Loss of -22.6 dB and and 2.94 dB are obtained respectively. In addition, it is shown the best frequency response from the design of the Parallel Coupled-Line Bandpass Filter.


2020 ◽  
Vol 96 (3s) ◽  
pp. 321-324
Author(s):  
Е.В. Ерофеев ◽  
Д.А. Шишкин ◽  
В.В. Курикалов ◽  
А.В. Когай ◽  
И.В. Федин

В данной работе представлены результаты разработки СВЧ монолитной интегральной схемы шестиразрядного фазовращателя и усилителя мощности диапазона частот 26-30 ГГц. СКО ошибки по фазе и амплитуде фазовращателя составили 1,2 град. и 0,13 дБ соответственно. Максимальная выходная мощность и КПД по добавленной мощности усилителя в точке сжатия Ку на 1 дБ составили 30 дБм и 20 % соответственно. This paper describes the design, layout, and performance of 6-bit phase shifter and power amplifier monolithic microwave integrated circuit (MMIC), 26-30 GHz band. Phase shifter MMIC has RMS phase error of 1.2 deg. And RMD amplitude error is 0.13 dB. MMIC power amplifier has output power capability of 30 dBm at 1 dB gain compression (P-1dB) and PAE of 20 %.


2020 ◽  
Vol 29 (11) ◽  
pp. 2020006
Author(s):  
Tian Qi ◽  
Songbai He ◽  
Cheng Zhong ◽  
Zhitao Zhu

In this paper, the design of a wideband monolithic microwave integrated circuit (MMIC) low-noise amplifier (LNA) fabricated in 0.13-[Formula: see text]m GaAs pHEMT process is presented. A simple T-type input matching network (IMN) and a source feedback structure are employed to achieve low noise figure (NF). The MMIC LNA, which operates across 12–18[Formula: see text]GHz, can be used for satellite applications. Experimental results show an NF around 1.5[Formula: see text]dB in 12–17.5[Formula: see text]GHz and a minimum NF of 1.21[Formula: see text]dB at 16.5[Formula: see text]GHz. In addition, a flat small-signal gain of [Formula: see text][Formula: see text]dB is achieved at 13.5–17.5[Formula: see text]GHz. The input return loss is lower than [Formula: see text] dB at 12–14.5[Formula: see text]GHz and the output return loss is lower than [Formula: see text] dB at 12–17[Formula: see text]GHz. The power consumed is lower than 0.3[Formula: see text]W and the [Formula: see text] (1-dB compression point) output power is around 13[Formula: see text]dBm.


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