Solid-Phase Epitaxial Growth of A-Site-Ordered Perovskite Sr4−xErxCo4O12−δ: A Room Temperature Ferrimagnetic p-Type Semiconductor

Pristine MnTe is a p-type semiconductor with a relatively low hole concentration of 1018 cm−3, low electrical conductivity, and thus poor TE performance at room temperature owing to the broad direct band gap of 1.27 eV.

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Heteroepitaxial Growth of a Wide Gap P-type Oxysulfide, LaCuOS

MRS Proceedings ◽

10.1557/proc-747-v6.9 ◽

2002 ◽

Vol 747 ◽

Author(s):

Hidenori Hiramatsu ◽

Kazushige Ueda ◽

Hiromichi Ohta ◽

Masahiro Hirano ◽

Hideo Hosono

Keyword(s):

Optical Properties ◽

Solid Phase ◽

Epitaxial Films ◽

Solid Phase Epitaxy ◽

Heteroepitaxial Growth ◽

Electrical And Optical Properties ◽

Type Semiconductor ◽

Wide Gap ◽

Spe Method ◽

P Type

ABSTRACTEpitaxial films of LaCuOS, a wide gap p-type semiconductor, were grown on yittria- stabi-lized-zirconia (YSZ) (001) or MgO (001) substrates by a reactive solid phase epitaxy (R-SPE) method. Crystal quality, electrical and optical properties on the epitaxial films on each substrate are examined in this paper. Achievement of the heteroepitaxial growth of LaCuOS on the MgO (001) substrate improves optical properties of LaCuOS such as spectral bandwidths and emission intensity, suggesting that the MgO (001) substrate is more preferable than the YSZ (001) for epitaxial growth substrate for LaCuOS.

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Room temperature sensing of ozone by transparent p-type semiconductor CuAlO2

Applied Physics Letters ◽

10.1063/1.1784888 ◽

2004 ◽

Vol 85 (10) ◽

pp. 1728-1729 ◽

Cited By ~ 82

Author(s):

X. G. Zheng ◽

K. Taniguchi ◽

A. Takahashi ◽

Y. Liu ◽

C. N. Xu

Keyword(s):

Room Temperature ◽

Temperature Sensing ◽

Type Semiconductor ◽

P Type

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Au doping of CdS polycrystalline films prepared by co-sputtering of CdS–Cd-Au targets

Superficies y Vacío ◽

10.47566/2012_syv25_1-040214 ◽

2012 ◽

Vol 25 (4) ◽

pp. 214-217

Author(s):

M. Becerril ◽

H. Silva López ◽

O. Zelaya Ángel ◽

J. R. Vargas García

Keyword(s):

Electrical Resistivity ◽

Optical Properties ◽

Room Temperature ◽

Polycrystalline Films ◽

Structural And Optical Properties ◽

Small Areas ◽

Glass Substrates ◽

Corning Glass ◽

Type Semiconductor ◽

P Type

Au doped CdS polycrystalline films were grown on Corning glass substrates at room temperature by co-sputtering from a CdS–Cd–Au target. Elemental Cd and Au were placed onto the CdS target covering small areas. The electrical, structural, and optical properties were analyzed as a function of Au content. The Au doped CdS polycrystalline films showed a p-type semiconductor nature. It was found that the electrical resistivity drops and the carrier concentration increases as a consequence of Au incorporation within the CdS lattice. In both cases, the changes were of several orders of magnitude.

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Structural characterization of damage in Si(100) produced by MeV Si+ ion implantation and annealing

Journal of Materials Research ◽

10.1557/jmr.1990.0352 ◽

1990 ◽

Vol 5 (2) ◽

pp. 352-359 ◽

Cited By ~ 36

Author(s):

M. K. El-Ghor ◽

O. W. Holland ◽

C. W. White ◽

S. J. Pennycook

Keyword(s):

Epitaxial Growth ◽

Liquid Nitrogen ◽

Room Temperature ◽

Solid Phase ◽

Liquid Nitrogen Temperature ◽

Interfacial Region ◽

Layer By Layer ◽

Extended Defects ◽

Lower Growth ◽

Wide Region

Buried amorphous layers were produced by implantation of MeV Si+ ions in silicon single crystal at room temperature and liquid nitrogen temperature. The damage is characterized structurally both in the as-implanted condition and after post-implantation furnace annealing. Growth of the amorphous layer during room temperature implantation is found to occur by a layer-by-layer mechanism with relatively sharp interfacial transition regions. A wide region ahead of the buried amorphous region extending to the surface is observed to be free of any extended defects. Recrystallization of the damaged region during thermal annealing occurs by solid-phase epitaxial growth at both interfaces. A lower growth velocity is found at the upper interface, which is attributed to a higher hairpin dislocation density grown-in at this interface. Results of irradiation at liquid nitrogen temperature, on the other hand, show that nucleation and growth of the amorphous damage occurs over a wide region and is not confined to the interfacial region. This results in a very diffuse upper interface composed of a mixture of amorphous and crystalline phases. Substantial reordering is observed in this mixed-phase region after 400°C annealing, even though this temperature is too low for normal interfacial solid-phase epitaxial growth. Cross-sectional transmission electron microscopy, as well as Rutherford backscattering spectroscopy, were used in this study.

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Epitaxial Growth of Cu Thin Films on (111)Si at Room Temperature

MRS Proceedings ◽

10.1557/proc-312-285 ◽

1993 ◽

Vol 312 ◽

Author(s):

C. S. Liu ◽

L. J. Chen

Keyword(s):

Thin Films ◽

Epitaxial Growth ◽

Electron Spectroscopy ◽

Auger Electron ◽

Room Temperature ◽

Solid Phase ◽

Edge Type ◽

X Ray ◽

Transmission Electron ◽

Interfacial Dislocations

AbstractEpitaxial growth of Cu thin films on atomically cleaned (111)Si has been studied by transmission electron microscopy (TEM), x-ray diffractometry (XRD) and Auger electron spectroscopy (AES). An interface compound, CuSix with x= 11.2 to 14 at.%, was observed to be present at the Cu/Si interface. Interfacial dislocations at the silicide/Si interface were identified to be of edge type with 1/2<110> Burgers vectors. η“-Cu3Si was found to form in samples annealed at 200 °C for 1 h. Solid phase epitaxial growth of silicon on (111)Si was observed to occur at a temperature as low as 200 °C. Polycrystalline η”-Cu3Si is the only phase present in samples annealed at 200–800 °C. In samples annealed at or higher than 850 °c, a mixture of η′-Cu3Si and η“-Cu3Si were found to be present.

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Buried Selective Growth of p-Doped SiC by VLS Epitaxy

Materials Science Forum ◽

10.4028/www.scientific.net/msf.717-720.169 ◽

2012 ◽

Vol 717-720 ◽

pp. 169-172 ◽

Cited By ~ 13

Author(s):

Davy Carole ◽

Stéphane Berckmans ◽

Arthur Vo-Ha ◽

Mihai Lazar ◽

Dominique Tournier ◽

...

Keyword(s):

Epitaxial Growth ◽

Room Temperature ◽

Selective Growth ◽

Initial Amount ◽

Deposition Kinetics ◽

Selective Epitaxial Growth ◽

P Type

Selective epitaxial growth in buried patterns was studied using the vapour-liquid-solid mechanism in Al-Si melt in order to obtain p+-doped SiC localized layers on 4H-SiC substrate. Homogeneous deposition with step bunched morphology was obtained by adding propane at room temperature before growth at 1100°C. Patterns as large as 800 µm and as narrow as 10 µm were completely filled in this way. The deposition kinetics demonstrates that the process is self limited and mainly depends on the initial amount of Si in the liquid. The deposit is highly p-type doped and the p-n junction is demonstrated.

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Characteristics of Trench-Refilled 4H-SiC P-N Junction Diodes Fabricated by Selective Epitaxial Growth

Materials Science Forum ◽

10.4028/www.scientific.net/msf.483-485.159 ◽

2005 ◽

Vol 483-485 ◽

pp. 159-162 ◽

Cited By ~ 2

Author(s):

Can Hua Li ◽

Peter A. Losee ◽

Joseph Seiler ◽

T. Paul Chow ◽

I. Bhat

Keyword(s):

Epitaxial Growth ◽

Leakage Current ◽

Nitrogen Doping ◽

Room Temperature ◽

Optical Microscope ◽

Dominant Mechanism ◽

Selective Epitaxial Growth ◽

Reverse Leakage Current ◽

Current Voltage ◽

P Type

Selective nitrogen doping of 4H-SiC by epitaxial growth using TaC as the high temperature mask has been demonstrated. Nomarski optical microscope and scanning electron microscope (SEM) were used to characterize selective growth of SiC. In addition, 250µm square shaped p-n junction diodes by selective n type epitaxial growth on p type epi layer were fabricated. The refilled fingers with different width were designed to vary the periphery/area (P/A) ratio. The effects of P/A ratio on the current-voltage (J-V) characteristics have been investigated. The ideality factor extracted from J-V characteristics is ≈2 at temperature range of 25-275°C, which indicates that the Shockley-Read-Hall recombination is the dominant mechanism in the conduction region. The reverse leakage current did not show dependence on P/A ratio for trench refilled diodes. The room temperature reverse leakage current density at 100V is less than 3.5×10-7 A/cm2 for all diodes. Also, the reverse leakage current did not increase significantly with temperature up to 275°C. The breakdown voltages measured at room temperature are about 450V and 400V for diodes without and with fingers, respectively.

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