Interface Properties and Channel Mobility of Plasma Nitrided Devices

ESSDERC ’89 ◽  
1989 ◽  
pp. 366-369 ◽  
Author(s):  
B. Piot ◽  
A. Straboni ◽  
B. Vuillermoz ◽  
K. Barla ◽  
M. Berenguer ◽  
...  
Keyword(s):  
Interface Properties ◽  
Channel Mobility

Improved Dielectric and Interface Properties of 4H-SiC MOS Structures Processed by Oxide Deposition and N2O Annealing

2006 ◽  
Vol 527-529 ◽  
pp. 987-990 ◽  
Author(s):  
Tsunenobu Kimoto ◽  
H. Kawano ◽  
Masato Noborio ◽  
Jun Suda ◽  
Hiroyuki Matsunami
Keyword(s):  
Breakdown Strength ◽  
Oxide Thickness ◽  
Interface State ◽  
State Density ◽  
Interface Properties ◽  
Gate Oxides ◽  
Channel Mobility ◽  
Oxide Deposition ◽  
Mos Structures

Oxide deposition followed by high-temperature annealing in N2O has been investigated to improve the quality of 4H-SiC MOS structures. Annealing of deposited oxides in N2O at 1300oC significantly enhances the breakdown strength and decreases the interface state density to 3x1011 cm-2eV-1 at EC – 0.2 eV. As a result, high channel mobility of 34 cm2/Vs and 52 cm2/Vs has been attained for inversion-type MOSFETs fabricated on 4H-SiC(0001)Si and (000-1)C faces, respectively. The channel mobility shows a maximum when the increase of oxide thickness during N2O annealing is approximately 5 nm. A lateral RESURF MOSFET with gate oxides formed by the proposed process has blocked 1450 V and showed a low on-resistance of 75 mcm2, which is one of the best performances among lateral SiC MOSFETs reported.

SiO2/SiC Interface Properties on Various Surface Orientations

2002 ◽  
Vol 742 ◽  
Author(s):  
Hiroshi Yano ◽  
Taichi Hirao ◽  
Tsunenobu Kimoto ◽  
Hiroyuki Matsunami
Keyword(s):  
Conduction Band ◽  
Room Temperature ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Band Edge ◽  
Conduction Band Edge ◽  
Interface Properties ◽  
Mos Capacitors ◽  
Channel Mobility

ABSTRACTThe interface properties of MOS capacitors and MOSFETs were characterized using the (0001), (1120), and (0338) faces of 4H-SiC. (0001) and (1120) correspond to (111) and (110) in cubic structure. (0338) is semi-equivalent to (100). The interface states near the conduction band edge are discussed based on the capacitance and conductance measurements of n-type MOS capacitors at a low temperature and room temperature. The (0338) face indicated the smallest interface state density near the conduction band edge and highest channel mobility in n-channel MOSFETs among these faces.

MOS Interface Properties and MOSFET Performance on 4H-SiC{0001} and Non-Basal Faces Processed by N2O Oxidation

2004 ◽  
Vol 815 ◽  
Author(s):  
T. Kimoto ◽  
Y. Kanzaki ◽  
M. Noborio ◽  
H. Kawano ◽  
H. Matsunami
Keyword(s):  
Doping Concentration ◽  
Interface State ◽  
Interface Structure ◽  
State Density ◽  
Interface State Density ◽  
Interface Properties ◽  
Crystal Face ◽  
Channel Mobility ◽  
Pile Up ◽  
Effective Channel

Abstract4H-SiC(0001), (000-1), and (11-20) have been directly oxidized by N2O at 1300°C, and the MOS interfaces have been characterized. The interface state density has been significantly reduced by N2O oxidation on any face, compared to conventional wet O2 oxidation at 1150°C. Planar n-channel MOSFETs fabricated on lightly-doped 4H-SiC(0001), (000-1) and (11-20) faces have shown an effective channel mobility of 26, 43, and 78 cm2/Vs, respectively. The mobility decreased with increasing the doping concentration of p-body. SIMS analyses have revealed a clear pile-up of nitrogen atoms near the MOS interface. The thickness of interfacial SiCxOy layer can be decreased by utilizing N2O oxidation. The crystal face dependence of interface structure is discussed.

Impact of gate electrode formation process on Al2O3/GaN interface properties and channel mobility

2021 ◽  
Author(s):  
Yuto Ando ◽  
Manato Deki ◽  
Hirotaka Watanabe ◽  
Noriyuki Taoka ◽  
Atsushi Tanaka ◽  
...  
Keyword(s):  
Formation Process ◽  
Interface Properties ◽  
Gate Electrode ◽  
Channel Mobility

scholarly journals Study and Assessment of Defect and Trap Effects on the Current Capabilities of a 4H-SiC-Based Power MOSFET

Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 735
Author(s):  
Fortunato Pezzimenti ◽  
Hichem Bencherif ◽  
Giuseppe De Martino ◽  
Lakhdar Dehimi ◽  
Riccardo Carotenuto ◽  
...  
Keyword(s):  
Drain Current ◽  
Oxide Semiconductor ◽  
Temperature Dependent ◽  
Channel Mobility ◽  
Blocking Voltage ◽  
Current Voltage ◽  
Wide Range ◽  
Temperature Ranges ◽  
Joint Contribution ◽  
State Resistance

A numerical simulation study accounting for trap and defect effects on the current-voltage characteristics of a 4H-SiC-based power metal-oxide-semiconductor field effect transistor (MOSFET) is performed in a wide range of temperatures and bias conditions. In particular, the most penalizing native defects in the starting substrate (i.e., EH6/7 and Z1/2) as well as the fixed oxide trap concentration and the density of states (DoS) at the 4H-SiC/SiO2 interface are carefully taken into account. The temperature-dependent physics of the interface traps are considered in detail. Scattering phenomena related to the joint contribution of defects and traps shift the MOSFET threshold voltage, reduce the channel mobility, and penalize the device current capabilities. However, while the MOSFET on-state resistance (RON) tends to increase with scattering centers, the sensitivity of the drain current to the temperature decreases especially when the device is operating at a high gate voltage (VGS). Assuming the temperature ranges from 300 K to 573 K, RON is about 2.5 MΩ·µm2 for VGS > 16 V with a percentage variation ΔRON lower than 20%. The device is rated to perform a blocking voltage of 650 V.

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