MOS Interface Properties and MOSFET Performance on 4H-SiC{0001} and Non-Basal Faces Processed by N2O Oxidation

2004 ◽  
Vol 815 ◽  
Author(s):  
T. Kimoto ◽  
Y. Kanzaki ◽  
M. Noborio ◽  
H. Kawano ◽  
H. Matsunami
Keyword(s):  
Doping Concentration ◽  
Interface State ◽  
Interface Structure ◽  
State Density ◽  
Interface State Density ◽  
Interface Properties ◽  
Crystal Face ◽  
Channel Mobility ◽  
Pile Up ◽  
Effective Channel

Abstract4H-SiC(0001), (000-1), and (11-20) have been directly oxidized by N2O at 1300°C, and the MOS interfaces have been characterized. The interface state density has been significantly reduced by N2O oxidation on any face, compared to conventional wet O2 oxidation at 1150°C. Planar n-channel MOSFETs fabricated on lightly-doped 4H-SiC(0001), (000-1) and (11-20) faces have shown an effective channel mobility of 26, 43, and 78 cm2/Vs, respectively. The mobility decreased with increasing the doping concentration of p-body. SIMS analyses have revealed a clear pile-up of nitrogen atoms near the MOS interface. The thickness of interfacial SiCxOy layer can be decreased by utilizing N2O oxidation. The crystal face dependence of interface structure is discussed.

SiO2/SiC Interface Properties on Various Surface Orientations

2002 ◽  
Vol 742 ◽  
Author(s):  
Hiroshi Yano ◽  
Taichi Hirao ◽  
Tsunenobu Kimoto ◽  
Hiroyuki Matsunami
Keyword(s):  
Conduction Band ◽  
Room Temperature ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Band Edge ◽  
Conduction Band Edge ◽  
Interface Properties ◽  
Mos Capacitors ◽  
Channel Mobility

ABSTRACTThe interface properties of MOS capacitors and MOSFETs were characterized using the (0001), (1120), and (0338) faces of 4H-SiC. (0001) and (1120) correspond to (111) and (110) in cubic structure. (0338) is semi-equivalent to (100). The interface states near the conduction band edge are discussed based on the capacitance and conductance measurements of n-type MOS capacitors at a low temperature and room temperature. The (0338) face indicated the smallest interface state density near the conduction band edge and highest channel mobility in n-channel MOSFETs among these faces.

scholarly journals Inversion channel mobility and interface state density of diamond MOSFET using N-type body with various phosphorus concentrations

2019 ◽  
Vol 114 (24) ◽  
pp. 242101 ◽  
Author(s):  
Tsubasa Matsumoto ◽  
Hiromitsu Kato ◽  
Toshiharu Makino ◽  
Masahiko Ogura ◽  
Daisuke Takeuchi ◽  
...  
Keyword(s):  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Channel Mobility ◽  
Inversion Channel

Electrical Properties of High-K LaLuO3 Gate Oxide for SOI MOSFETs

2011 ◽  
Vol 276 ◽  
pp. 87-93
Author(s):  
Y.Y. Gomeniuk ◽  
Y.V. Gomeniuk ◽  
A. Nazarov ◽  
P.K. Hurley ◽  
Karim Cherkaoui ◽  
...  
Keyword(s):  
Electrical Characterization ◽  
Gate Oxide ◽  
Interface State ◽  
Channel Length ◽  
State Density ◽  
Interface State Density ◽  
Mos Capacitors ◽  
Channel Mobility ◽  
Threshold Voltages

The paper presents the results of electrical characterization of MOS capacitors and SOI MOSFETs with novel high-κ LaLuO3 dielectric as a gate oxide. The energy distribution of interface state density at LaLuO3/Si interface is presented and typical maxima of 1.2×1011 eV–1cm–2 was found at about 0.25 eV from the silicon valence band. The output and transfer characteristics of the n- and p-MOSFET (channel length and width were 1 µm and 50 µm, respectively) are presented. The front channel mobility appeared to be 126 cm2V–1s–1 and 70 cm2V–1s–1 for n- and p-MOSFET, respectively. The front channel threshold voltages as well as the density of states at the back interface are presented.

Analysis of Interface Trap Density and Channel Mobility in 4H-SiC NMOS Capacitors and Lateral MOSFETs

2017 ◽  
Vol 897 ◽  
pp. 115-118
Author(s):  
Martin Domeij ◽  
Jimmy Franchi ◽  
Krister Gumaelius ◽  
K. Lee ◽  
Fredrik Allerstam
Keyword(s):  
Threshold Voltage ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Trap Density ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Subthreshold Slope ◽  
Gate Oxides ◽  
Channel Mobility

Lateral implanted SiC MOSFETs and NMOS capacitors were fabricated and used to extract channel mobility and interface state density DIT for three different gate oxides. DIT values were extracted using the high(1 MHz)-low(1 kHz) method for NMOS capacitors and the subthreshold slope for MOSFETs. The subthreshold slope extraction gave 6-20 times higher DIT values compared to the high-low method, presumably because the high-low method cannot capture the fastest traps [1]. None of the methods resulted in clear proportionality between the inverse channel mobility and DIT. The subthreshold slope gave similar DIT values for samples with different surface p-doping concentrations indicating that the method is not sensitive to the threshold voltage.

Improved Dielectric and Interface Properties of 4H-SiC MOS Structures Processed by Oxide Deposition and N2O Annealing

2006 ◽  
Vol 527-529 ◽  
pp. 987-990 ◽  
Author(s):  
Tsunenobu Kimoto ◽  
H. Kawano ◽  
Masato Noborio ◽  
Jun Suda ◽  
Hiroyuki Matsunami
Keyword(s):  
Breakdown Strength ◽  
Oxide Thickness ◽  
Interface State ◽  
State Density ◽  
Interface Properties ◽  
Gate Oxides ◽  
Channel Mobility ◽  
Oxide Deposition ◽  
Mos Structures

Oxide deposition followed by high-temperature annealing in N2O has been investigated to improve the quality of 4H-SiC MOS structures. Annealing of deposited oxides in N2O at 1300oC significantly enhances the breakdown strength and decreases the interface state density to 3x1011 cm-2eV-1 at EC – 0.2 eV. As a result, high channel mobility of 34 cm2/Vs and 52 cm2/Vs has been attained for inversion-type MOSFETs fabricated on 4H-SiC(0001)Si and (000-1)C faces, respectively. The channel mobility shows a maximum when the increase of oxide thickness during N2O annealing is approximately 5 nm. A lateral RESURF MOSFET with gate oxides formed by the proposed process has blocked 1450 V and showed a low on-resistance of 75 mcm2, which is one of the best performances among lateral SiC MOSFETs reported.

Enhanced Channel Mobility in 4H-SiC MISFETs by Utilizing Deposited SiN/SiO2 Stack Gate Structures

2008 ◽  
Vol 600-603 ◽  
pp. 679-682 ◽  
Author(s):  
Masato Noborio ◽  
Jun Suda ◽  
Tsunenobu Kimoto
Keyword(s):  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Post Deposition Annealing ◽  
Interface Quality ◽  
Channel Mobility ◽  
Capacitance Voltage ◽  
Mis Capacitors ◽  
Post Deposition ◽  
Time Lead

Deposited SiN/SiO2 stack gate structures have been investigated to improve the 4H-SiC MOS interface quality. Capacitance-voltage measurements on fabricated SiN/SiO2 stack gate MIS capacitors have indicated that the interface state density is reduced by post-deposition annealing in N2O at 1300°C. The usage of thin SiN and increase in N2O-annealing time lead to a low interface state density of 1×1011 cm-2eV-1 at EC – 0.2 eV. Oxidation of the SiN during N2O annealing has resulted in improvement of SiC MIS interface. The fabricated SiN/SiO2 stack gate MISFETs demonstrate a high channel mobility of 32 cm2/Vs on (0001)Si face and 40 cm2/Vs on (000-1)C face.

Significant Decrease of the Interface State Density by NH3 Plasma Pretreatment at 4H-SiC (000-1) Surface and its Bond Configuration

2010 ◽  
Vol 645-648 ◽  
pp. 503-506 ◽  
Author(s):  
Yoshinori Iwasaki ◽  
Hiroshi Yano ◽  
Tomoaki Hatayama ◽  
Yukiharu Uraoka ◽  
Takashi Fuyuki
Keyword(s):  
Photoelectron Spectroscopy ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Interface Properties ◽  
Dangling Bonds ◽  
X Ray ◽  
Plasma Pretreatment

We have investigated NH3 plasma pretreatment for Si- and C-face 4H-SiC and characterized interface properties and bond configuration. It is revealed that the NH3 plasma pretreatment is effective to reduce interface state density on C-face. From X-ray photoelectron spectroscopy (XPS) measurements, N- and H-related C bonds were observed. N and H passivate C-related defects and dangling bonds, resulting in improved interface properties.

High Channel Mobility in P-Channel MOSFETs Fabricated on 4H-SiC (0001) and Non-Basal Faces

2009 ◽  
Vol 615-617 ◽  
pp. 789-792
Author(s):  
Masato Noborio ◽  
Jun Suda ◽  
Tsunenobu Kimoto
Keyword(s):  
Thermal Oxidation ◽  
Interface State ◽  
Original Method ◽  
State Density ◽  
Interface State Density ◽  
Gate Oxides ◽  
Channel Mobility ◽  
Mos Devices

P-channel MOSFETs have been fabricated on 4H-SiC (0001) face as well as on 4H-SiC (03-38) and (11-20) faces. The gate oxides were formed by thermal oxidation in dry N2O ambient, which is widely accepted to improve the performance of n-channel SiC MOSFETs. The p-channel SiC MOSFETs with N2O-grown oxides on 4H-SiC (0001), (03-38), and (11-20) faces show a channel mobility of 7 cm2/Vs, 11 cm2/Vs, and 17 cm2/Vs, respectively. From the quasi-static C-V curves measured by using gate-controlled diodes, the interface state density was calculated by an original method. The interface state density was the lowest at the SiO2/4H-SiC (03-38) interface (about 1x1012 cm-2eV-1 at EV + 0.2 eV). The authors have applied deposited oxides to the 4H-SiC p-channel MOSFETs. The (0001), (03-38), and (11-20) MOSFETs with deposited oxides exhibit a channel mobility of 10 cm2/Vs, 13 cm2/Vs, and 17 cm2/Vs, respectively. The deposited oxides are one of effective approaches to improve both n-channel and p-channel 4H-SiC MOS devices.

Epitaxial Growth of SiC on Non-Typical Orientations and MOS Interfaces

2000 ◽  
Vol 640 ◽  
Author(s):  
Hiroyuki Matsunami ◽  
Tsunenobu Kimoto ◽  
Hiroshi Yano
Keyword(s):  
Vapor Deposition ◽  
Chemical Vapor ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Electron Trapping ◽  
Conduction Band Edge ◽  
Coulomb Scattering ◽  
High Quality ◽  
Channel Mobility

ABSTRACTHigh-quality 4H-SiC has been epitaxially grown on (1120) substrates by chemical vapor deposition. The physical properties of epilayers and MOS interfaces on both (1120) and off-axis (0001) substrates are elucidated. An unintentionally doped 4H-SiC epilayer on (1120) shows a donor concentration of 1×1014 cm−3 with a total trap concentration as low as 3.8×1012 cm−3. Inversion-type planar MOSFETs fabricated on 4H-SiC (1120) exhibit a high channel mobility of 96 cm2/Vs. The channel mobility decreases according to the T−2.2 dependence above 200K, indicating reduced Coulomb scattering and/or electron trapping. The superior MOS interface on (1120) originates from the much lower interface state density near the conduction band edge.

Improved Evaluation Method for Channel Mobility in SiC Trench MOSFETs

2015 ◽  
Vol 821-823 ◽  
pp. 757-760 ◽  
Author(s):  
Katsuhiro Kutsuki ◽  
Sachiko Kawaji ◽  
Yukihiko Watanabe ◽  
Shinichiro Miyahara ◽  
Jun Saito
Keyword(s):  
Evaluation Method ◽  
Drain Current ◽  
Interface State ◽  
State Density ◽  
Effective Field ◽  
Channel Mobility ◽  
Definition Of ◽  
Effective Channel ◽  
Dominant Influence ◽  
The Ideal

We proposed an improved method for evaluating the effective channel mobility (μeff), involving an appropriate definition of the threshold voltage (Vth) based on the ideal gate bias voltage – drain current (VG-ID) characteristics. Using this method, the dependence of μeff on the effective field (Eeff) could be evaluated even for SiC trench MOSFETs with large interface state density (Dit) values. The dominant influence on μeff in the low Eeff region was found to be Coulomb scattering caused by interface states at the SiC/SiO2 interfaces.

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