Analysis of Capacitance–Voltage Characteristics for Ultrathin Si/SiGe/Si Hetero-Layered MOS Structure

In this work, nanocrystal nonvolatile memory devices comprising of silicon nanocrystals located in gate oxide of MOS structure, were comprehensively studied on specialized modular data acquisition setup developed for capacitance-voltage measurements. The memory window formation, memory window retention and charge relaxation experimental methods were used to study the trapping/emission processes inside the dielectric layer of MOS capacitor memory. The trapping/emission processes were studied in standard bipolar memory mode and in new unipolar memory mode, which is specific for nanocrystalline nonvolatile memory. The analysis of experimental results shown that unipolar programming mode is more favourable for nanocrystalline memory operation due to lower wearing out and higher breakdown immunity of the MOS device’s oxide. The study was performed for two types of nanocrystalline memory devices: with one and two silicon nanocrystalline 2D layers in oxide of MOS structure correspondingly. The electrostatic modelling was presented to explain the experimental results.

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Features of the capacitance-voltage characteristics in a MOS structure due to the oxide charge

Semiconductors ◽

10.1134/s1063782608110213 ◽

2008 ◽

Vol 42 (11) ◽

pp. 1351-1354 ◽

Cited By ~ 4

Author(s):

E. A. Bobrova ◽

N. M. Omeljanovskaya

Keyword(s):

Oxide Charge ◽

Mos Structure ◽

Capacitance Voltage

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Noncontact, Electrode-free Capacitance/Voltage Measurement Based on General Theory of Metal-Oxide-Semiconductor (MOS) Structure

Japanese Journal of Applied Physics ◽

10.1143/jjap.32.4005 ◽

1993 ◽

Vol 32 (Part 1, No. 9A) ◽

pp. 4005-4011 ◽

Cited By ~ 12

Author(s):

Takamasa Sakai ◽

Motohiro Kohno ◽

Sadao Hirae ◽

Ikuyoshi Nakatani ◽

Tatsufumi Kusuda

Keyword(s):

General Theory ◽

Metal Oxide ◽

Metal Oxide Semiconductor ◽

Oxide Semiconductor ◽

Voltage Measurement ◽

Mos Structure ◽

Capacitance Voltage

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Hysteresis effects on carrier transport and photoresponse characteristics in hybrid perovskites

Journal of Materials Chemistry C ◽

10.1039/c9tc06326a ◽

2020 ◽

Vol 8 (6) ◽

pp. 1962-1971 ◽

Cited By ~ 3

Author(s):

Tiqiang Pang ◽

Kai Sun ◽

Yucheng Wang ◽

Suzhen Luan ◽

Yuming Zhang ◽

...

Keyword(s):

Carrier Transport ◽

Transport Model ◽

Ion Migration ◽

Mos Structure ◽

Capacitance Voltage

Characterizing ion migration using capacitance–voltage characteristics and proposing a carrier transport model for a perovskite MOS structure.

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Effects of Gamma-Ray Irradiation and Thermal Annealing on Characteristics of 3C-SIC MOS Structure

MRS Proceedings ◽

10.1557/proc-281-797 ◽

1992 ◽

Vol 281 ◽

Author(s):

M. Yoshikawa ◽

Y. Morita ◽

H. Itoh ◽

I. Nashiyama ◽

H. Okumura ◽

...

Keyword(s):

Thermal Annealing ◽

Room Temperature ◽

Gamma Ray ◽

Oxide Semiconductor ◽

Interface Traps ◽

Mos Structure ◽

Capacitance Voltage ◽

Different Types ◽

Gamma Ray Irradiation ◽

Mos Structures

ABSTRACTThermal annealing of interface traps introduced by 60Co gamma-ray irradiation in 3C-SiC metal-oxide-semiconductor (MOS) structures have been studied by high-frequency capacitance-voltage measurements. By isochronal annealing up to 400°C, two recovery stages were observed, which correspond to the annealing of two different types of the interface traps. It was found that introduction of the interface traps was suppressed by thermal annealing before irradiation. Radiation tolerance of 3C-SiC MOS structure is explained in terms of the room temperature annealing of the interface traps introduced by irradiation.

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