scholarly journals Design of an active front-end rectifier controller with an accurate estimation for the dynamic of its deadbeat current control loop

2020 ◽  
Vol 2 (6) ◽  
Author(s):  
Ines Ben Ali ◽  
Mohamed Wissem Naouar ◽  
Eric Monmasson
Keyword(s):  
Current Control ◽  
Accurate Estimation ◽  
Control Loop ◽  
Front End

Performance enhancement of switched reluctance motor drive using front-end converter

Circuit World ◽  
2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Indira Damarla ◽  
Venmathi Mahendran
Keyword(s):  
Switched Reluctance Motor ◽  
Voltage Regulation ◽  
Current Control ◽  
Switching Frequency ◽  
Control Loop ◽  
Content Type ◽  
Switched Reluctance ◽  
Front End ◽  
Wide Range ◽  
Reluctance Motor

Purpose The main purpose of this paper is to propose a quasi-impedance source (QIS) converter fed switched reluctance motor (SRM) drive. The proposed converter topology is configured for DC link capacitance minimization and power factor (PF) correction. Design/methodology/approach A QIS converter is used as a front end converter to reduce the bulk capacitance requirement during current commutation and to decline the power ripple. To improve the PF with reduced total harmonic distortion at the input current, the PF current control loop is merged with the QIS converter control loop. Findings The overall SRM drive speed is regulated over a wide range by controlling the DC link voltage. The voltage regulation can be achieved by pulse width modulation of the QIS converter. Hence, the overall system efficiency has been improved by operating the proposed converter at a low switching frequency. Moreover, the proposed QIS converter uses an advanced repetitive controller to achieve voltage regulation and fewer ripples in torque. Originality/value The steady state and dynamic analyzes have been performed on the proposed drive topology. The performance of the proposed topology has been simulated through MATLAB/Simulink environment. A hardware prototype with a processor of Xilinx SPARTAN 6 field-programmable gate array has been used to validate the experimental response with the simulation results.

scholarly journals Continuous Control Set Predictive Current Control for Induction Machine

2021 ◽  
Vol 11 (13) ◽  
pp. 6230
Author(s):  
Toni Varga ◽  
Tin Benšić ◽  
Vedrana Jerković Štil ◽  
Marinko Barukčić
Keyword(s):  
Control Method ◽  
Induction Machine ◽  
Current Control ◽  
Continuous Control ◽  
Loop Model ◽  
Voltage Reference ◽  
Control Loop ◽  
Speed Tracking ◽  
Finite Control ◽  
Control Set

A speed tracking control method for induction machine is shown in this paper. The method consists of outer speed control loop and inner current control loop. Model predictive current control method without the need for calculation of the weighing factors is utilized for the inner control loop, which generates a continuous set of voltage reference values that can be modulated and applied by the inverter to the induction machine. Interesting parallels are drawn between the developed method and state feedback principles that helped with the analysis of the stability and controllability. Simple speed and rotor flux estimator is implemented that helps achieve sensorless control. Simulation is conducted and the method shows great performance for speed tracking in a steady state, and during transients as well. Additionally, compared to the finite control set predictive current control, it shows less harmonic content in the generated torque on the rotor shaft.

scholarly journals Improved Self-Sensing Speed Control of IPMSM Drive Based on Cascaded Nonlinear Control

Energies ◽  
2021 ◽  
Vol 14 (8) ◽  
pp. 2205
Author(s):  
Muhammad Usama ◽  
Jaehong Kim
Keyword(s):  
Fuzzy Logic Controller ◽  
Control Design ◽  
Speed Control ◽  
Current Control ◽  
The Self ◽  
Pole Placement ◽  
Motor Drive ◽  
Control Performance ◽  
Control Loop ◽  
Maximum Torque

This paper presents a nonlinear cascaded control design that has been developed to (1) improve the self-sensing speed control performance of an interior permanent magnet synchronous motor (IPMSM) drive by reducing its speed and torque ripples and its phase current harmonic distortion and (2) attain the maximum torque while utilizing the minimum drive current. The nonlinear cascaded control system consists of two nonlinear controls for the speed and current control loop. A fuzzy logic controller (FLC) is employed for the outer speed control loop to regulate the rotor shaft speed. Model predictive current control (MPCC) is utilized for the inner current control loop to regulate the drive phase currents. The nonlinear equation for the dq reference current is derived to implement the maximum torque per armature (MTPA) control to achieve the maximum torque while using the minimum current values. The model reference adaptive system (MRAS) was employed for the speed self-sensing mechanism. The self-sensing speed control performance of the IPMSM motor drive was compared with that of the traditional cascaded control schemes. The stability of the sensorless mechanism was studied using the pole placement method. The proposed nonlinear cascaded control was verified based on the simulation results. The robustness of the control design was ensured under various loads and in a wide speed range. The dynamic performance of the motor drive is improved while circumventing the need to tune the proportional-integral (PI) controller. The self-sensing speed control performance of the IPMSM drive was enhanced significantly by the designed cascaded control model.

scholarly journals Cooperation of Voltage Controlled Active Power Filter with Grid-Connected DGs in Microgrid

2018 ◽  
Vol 11 (1) ◽  
pp. 154 ◽  
Author(s):  
Hafiz Munir ◽  
Jianxiao Zou ◽  
Chuan Xie ◽  
Josep Guerrero
Keyword(s):  
Power Distribution ◽  
Distribution Systems ◽  
Active Power Filter ◽  
Active Power ◽  
Current Control ◽  
Control Loop ◽  
Renewable Energy Resources ◽  
Harmonic Compensation ◽  
Power Filter ◽  
Voltage Feedback

Due to the excessive use of nonlinear loads and inverter interfaced distributed generators, harmonic issues have been regarded as a major concern in power distribution systems. Therefore, harmonic compensation in microgrids is a subject of current interest. Consequently, a novel direct harmonic voltage-controlled mode (VCM) active power filter (APF) is proposed to mitigate the harmonics in a cooperative manner and provide a better harmonic compensation performance of less than 5%. Due to the dispersive characteristics of renewable energy resources, voltage feedback based on a harmonic compensation control loop is implemented for the first time. This system can be smoothly combined with the current control loop. Our method proposes a better performance while mitigating the harmonics in comparison with conventional resistive active power filters (R-APF). Based on direct voltage detection at the point of common coupling (PCC), the proposed VCM-APF can therefore be seamlessly incorporated with multiple grid-connected generators (DGs) to enhance their harmonic compensation capabilities. The advantage of this scheme is that it avoids the need for designing and tuning the resistance, which was required in earlier conventional control schemes of R-APF for voltage unbalance compensation. Additionally, our scheme does not require the grid and load current measurements since these can be carried out at the PCC voltage, which further reduces the implementation cost of the system. Furthermore, the simulation results show the significance of proposed method.

Resource Efficient Architecture for Current Control Loop of Two PMSMs

2015 ◽  
Vol 741 ◽  
pp. 619-622
Author(s):  
Cho Lung Ryang ◽  
Da Ling Wang
Keyword(s):  
Permanent Magnet Synchronous Motor ◽  
Pi Controller ◽  
Current Control ◽  
Resource Consumption ◽  
Control Loop ◽  
Verilog Hdl ◽  
Control Loops ◽  
System Generator ◽  
Pi Controllers ◽  
Closed Current

This paper presents a novel closed current control loop of permanent magnet synchronous motor (PMSM). Conventional current control loops need two PI controllers per one PMSM. The paper provides a method for reduction of the resource consumption by using one PI controller for two PMSM. Combining with Black Box Blockset written by Verilog HDL based on Xilinx System Generator, one effective PI controller is designed instead of four PI controllers and simulated using Simulink. The utilization of FPGA resources is verified by Xilinx ISE 14.7 tool. The results show that the proposed method can reduce resource consumption and do not influence system performances observably.

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