Electron beam testing of VLSI circuits assisted by focused ion beam etching

1986 ◽  
Vol 4 (2) ◽  
pp. 107-120 ◽  
Author(s):  
Hideaki Arima ◽  
Takayuki Matsukawa ◽  
Junichi Mitsuhashi ◽  
Hiroaki Morimoto ◽  
Hidefumi Nakata
Keyword(s):  
Electron Beam ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Vlsi Circuits ◽  
Ion Beam Etching

Electron beam testing of multilevel metal integrated circuits

1991 ◽  
Vol 49 ◽  
pp. 830-831
Author(s):  
P. E. Russell ◽  
Z. J. Radzimski ◽  
D. A. Ricks ◽  
J. P. Vitarelli
Keyword(s):  
Electron Beam ◽  
Integrated Circuits ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Measurement Techniques ◽  
Ion Beam Etching ◽  
Voltage Contrast ◽  
Modelling Effort ◽  
Established Technique

Fundamentally, voltage contrast is a well established technique for determination of voltages on metal surface which can be directly probed with an electron beam. However, actual integrated circuits (IC) consist of two or more conducting layers (metal and doped polysilicon) separated by dielectrics and covered by a dielectric passivation layer. Our work has addressed: i) the removal of dielectric layers (depassivation) by reactive ion etching (RIE) or selectively by focused ion beam etching to allow access to exposed metal lines; ii) modelling effort to understand how the materials and geometric parameters of multilevel IC's affect voltage contrast measurements, and iii) improvements in retarding field spectrometer based measurement techniques.

Fin Level Defect Isolation Inside a FinFET Using Electron Beam Alteration of Current Flow

2017 ◽  
Author(s):  
H.J. Ryu ◽  
A.B. Shah ◽  
Y. Wang ◽  
W.-H. Chuang ◽  
T. Tong
Keyword(s):  
Electron Microscopy ◽  
Electron Beam ◽  
Focused Ion Beam ◽  
Current Flow ◽  
Ion Beam ◽  
The Body ◽  
Complete Understanding ◽  
Root Cause ◽  
Transmission Electron ◽  
Defect Isolation

Abstract When failure analysis is performed on a circuit composed of FinFETs, the degree of defect isolation, in some cases, requires isolation to the fin level inside the problematic FinFET for complete understanding of root cause. This work shows successful application of electron beam alteration of current flow combined with nanoprobing for precise isolation of a defect down to fin level. To understand the mechanism of the leakage, transmission electron microscopy (TEM) slice was made along the leaky drain contact (perpendicular to fin direction) by focused ion beam thinning and lift-out. TEM image shows contact and fin. Stacking fault was found in the body of the silicon fin highlighted by the technique described in this paper.

Carbon Coating for Electron Beam Testing and Focus Ion Beam Reconfiguration

1996 ◽  
Author(s):  
P. Perdu ◽  
G. Perez ◽  
M. Dupire ◽  
B. Benteo
Keyword(s):  
Electron Beam ◽  
Sample Preparation ◽  
Carbon Coating ◽  
Focused Ion Beam ◽  
Sacrificial Layer ◽  
Ion Beam ◽  
Electrical Characterization ◽  
Fault Analysis ◽  
Voltage Contrast ◽  
The Right

Abstract To debug ASIC we likely use accurate tools such as an electron beam tester (Ebeam tester) and a Focused Ion Beam (FIB). Interactions between ions or electrons and the target device build charge up on its upper glassivation layer. This charge up could trigger several problems. With Ebeam testing, it sharply decreases voltage contrast during Image Fault Analysis and hide static voltage contrast. During ASIC reconfiguration with FIB, it could induce damages in the glassivation layer. Sample preparation is getting a key issue and we show how we can deal with it by optimizing carbon coating of the devices. Coating is done by an evaporator. For focused ion beam reconfiguration, we need a very thick coating. Otherwise the coating could be sputtered away due to imaging. This coating is use either to avoid charge-up on glassivated devices or as a sacrificial layer to avoid short circuits on unglassivated devices. For electron beam Testing, we need a very thin coating, we are now using an electrical characterization method with an insitu control system to obtain the right thin thickness. Carbon coating is a very cheap and useful method for sample preparation. It needs to be tuned according to the tool used.

Growth Mechanism and Field Emission Characteristics of GaO/GaN Nanotips Using Iodine-assisted Enhanced Focused Ion Beam Etching

2011 ◽  
Vol 7 (4) ◽  
pp. 594-597
Author(s):  
Zhan-Shuo Hu ◽  
Fei-Yi Hung ◽  
Shoou-Jinn Chang ◽  
Bohr-Ran Huang ◽  
Bo-Cheng Lin ◽  
...  
Keyword(s):  
Field Emission ◽  
Growth Mechanism ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Emission Characteristics ◽  
Ion Beam Etching

scholarly journals Focused Ion Beam Etching of GaN

1999 ◽  
Vol 4 (S1) ◽  
pp. 769-774 ◽  
Author(s):  
C. Flierl ◽  
I.H. White ◽  
M. Kuball ◽  
P.J. Heard ◽  
G.C. Allen ◽  
...  
Keyword(s):  
Focused Ion Beam ◽  
Ion Beam ◽  
Etching Rate ◽  
Side Wall ◽  
Device Fabrication ◽  
Direct Write ◽  
Ion Beam Etching ◽  
Etched Surface ◽  
A Current ◽  
Established Technique

We have investigated the use of focused ion beam (FIB) etching for the fabrication of GaN-based devices. Although work has shown that conventional reactive ion etching (RIE) is in most cases appropriate for the GaN device fabrication, the direct write facility of FIB etching – a well-established technique for optical mask repair and for IC failure analysis and repair – without the requirement for depositing an etch mask is invaluable. A gallium ion beam of about 20nm diameter was used to sputter GaN material. The etching rate depends linearly on the ion dose per area with a slope of 3.5 × 10−4 μm3/pC. At a current of 3nA, for example, this corresponds to an each rate of 1.05 μm3/s. Good etching qualities have been achieved with a side wall roughness significantly below 0.1 μm. Change in the roughness of the etched surface plane stay below 8nm.

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