Flexible field-effect transistors using top-down fabrication of (111)-silicon nanowires and wafer-level transfer process for neural prostheses

2017 ◽  
Vol 175 ◽  
pp. 23-29 ◽  
Author(s):  
Sangmin Lee ◽  
Dong-il “Dan” Cho
2020 ◽  
Author(s):  
C. Delacour ◽  
F. Veliev ◽  
T. Crozes ◽  
G. Bres ◽  
J. Minet ◽  
...  

ABSTRACTSilicon nanowire field effect transistors SiNW-FETs provide a local probe for sensing neuronal activity at the subcellular scale, thanks to their nanometer size and ultrahigh sensitivity. The combination with micro-patterning or microfluidic techniques to build model neurons networks above SiNW arrays could allow monitoring spike propagation and tailor specific stimulations, being useful to investigate network communications at multiple scales, such as plasticity or computing processes. This versatile device could be useful in many research areas, including diagnosis, prosthesis, and health security. Using top-down silicon nanowires-based array, we show here the ability to record electrical signals from matured neurons with top-down silicon nanowires, such as local field potential and unitary spike within ex-vivo preparations and hippocampal neurons grown on chip respectively. Furthermore, we demonstrate the ability to guide neurites above the sensors array during 3 weeks of cultures and follow propagation of spikes along cells. Silicon nanowire field effect transistors are obtained by top-down approach with CMOS compatible technology, showing the possibility to implement them at manufacturing level. These results confirm further the potentiality of the approach to follow spike propagation over large distances and at precise location along neuronal cells, by providing a multiscale addressing at the nano and mesoscales.


2012 ◽  
Vol 4 (8) ◽  
pp. 4251-4258 ◽  
Author(s):  
Bin Wang ◽  
Thomas Stelzner ◽  
Rawi Dirawi ◽  
Ossama Assad ◽  
Nisreen Shehada ◽  
...  

2012 ◽  
Vol 2012 ◽  
pp. 1-13 ◽  
Author(s):  
Dawit Gedamu ◽  
Ingo Paulowicz ◽  
Seid Jebril ◽  
Yogendra Kumar Mishra ◽  
Rainer Adelung

1-dimensional metal and semiconductor nanostructures exhibit interesting physical properties, but their integration into modern electronic devices is often a very challenging task. Finding the appropriate supports for nanostructures and nanoscale contacts are highly desired aspects in this regard. In present work we demonstrate the fabrication of 1D nano- and mesostructures between microstructured contacts formed directly on a silicon chip either by a thin film fracture (TFF) approach or by a modified vapor-liquid-solid (MVLS) approach. In principle, both approaches offer the possibilities to integrate these nano-meso structures in wafer-level fabrications. Electrical properties of these nano-micro structures integrated on Si chips and their preliminary applications in the direction of sensors and field effect transistors are also presented.


2015 ◽  
Vol 15 (10) ◽  
pp. 7551-7554 ◽  
Author(s):  
Min Seok Kang ◽  
Susanna Yu ◽  
Sang Mo Koo

We fabricated 4H-SiC nanoribbon field effect transistors (FETs) of various channel thickness (tch) of 100∼500 nm by a “top–down” approach, using a lithography and plasma etching process. We studied the dependence of the device transfer characteristics on the channel geometry. This demonstrated that fabricated SiC nanoribbon FETs with a tch of 100 nm show normally-on characteristics, and have a threshold voltage of −12 V, and a maximum transconductance value of 8.8 mS, which shows improved drain current degradation of the SiC nanoribbon FETs with tch =100 nm at elevated temperature. This can be attributed to the improved heat dissipation, enhanced channel mobility, and together with widening of effective channel thickness depletion induced.


2019 ◽  
Vol 9 (17) ◽  
pp. 3462 ◽  
Author(s):  
Muhammad Bilal Khan ◽  
Dipjyoti Deb ◽  
Jochen Kerbusch ◽  
Florian Fuchs ◽  
Markus Löffler ◽  
...  

We present results of our investigations on nickel silicidation of top-down fabricated silicon nanowires (SiNWs). Control over the silicidation process is important for the application of SiNWs in reconfigurable field-effect transistors. Silicidation is performed using a rapid thermal annealing process on the SiNWs fabricated by electron beam lithography and inductively-coupled plasma etching. The effects of variations in crystallographic orientations of SiNWs and different NW designs on the silicidation process are studied. Scanning electron microscopy and transmission electron microscopy are performed to study Ni diffusion, silicide phases, and silicide–silicon interfaces. Control over the silicide phase is achieved together with atomically sharp silicide–silicon interfaces. We find that {111} interfaces are predominantly formed, which are energetically most favorable according to density functional theory calculations. However, control over the silicide length remains a challenge.


Nanoscale ◽  
2010 ◽  
Vol 2 (5) ◽  
pp. 677 ◽  
Author(s):  
Caroline Celle ◽  
Alexandre Carella ◽  
Denis Mariolle ◽  
Nicolas Chevalier ◽  
Emmanuelle Rouvière ◽  
...  

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