Performance study of an inverse class E power amplifier with series tunable parallel resonant tank

An analysis of operation of a modified inverse class E power amplifier is presented. The proposed amplifier that has a series tunable parallel resonant tank is similar to a hybrid of class F and inverse class E. The principles and design equations required to determine the optimum operation of the amplifier are analyzed in detail. The practical circuit using LDMOS MRF21010 is shown to be able to deliver 40.02 dBm outpout power at 155 MHz. The amplifier achieves power-added efficiency (PAE) of 78.18% and drain efficiency of 78.42%, and exhibits 25.02 dB power gain when operates from a 21 V supply voltage. Comparisons of simulated and measured results are given with good agreement between them being achieved.

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Analysis and Compensation of the AM-AM and AM-PM Distortion for CMOS Cascode Class-E Power Amplifier

International Journal of Microwave Science and Technology ◽

10.1155/2009/597592 ◽

2009 ◽

Vol 2009 ◽

pp. 1-9 ◽

Cited By ~ 1

Author(s):

Wen An Tsou ◽

Wen Shen Wuen ◽

Tzu Yi Yang ◽

Kuei Ann Wen

Keyword(s):

Output Power ◽

Power Amplifier ◽

Supply Voltage ◽

Cmos Technology ◽

Signal Source ◽

Nonlinear Capacitance ◽

Power Added Efficiency ◽

Equivalent Impedance ◽

Common Gate ◽

Class E

Analysis and compensation methodology of the AM-AM and AM-PM distortion of cascode class-E power amplifiers are presented. A physical-based model is proposed to illustrate that the nonlinear capacitance and transconductance cause the AM-AM and AM-PM distortion when modulating the supply voltage of the PA. A novel methodology that can reduce the distortion is also proposed. By degenerating common-gate transistor into a resistor, the constant equivalent impedance is obtained so that the AM-AM and AM-PM distortion is compensated. An experimental prototype of 2.6 GHz cascode class-E power amplifier with the AM-AM and AM-PM compensation has been integrated in a 0.18 μm CMOS technology, occupies a total die area of 1.6 mm2. It achieves a drain efficiency of 17.8% and a power-added efficiency of 16.6% while delivering 12 dBm of linear output power and drawing 31 mA from a 1.8 V supply. Finally, a co-simulation result demonstrated that, when the distortion of the PA has been compensated, the EVM is improved from −17 dB to −19 dB with an IEEE802.11a-like signal source.

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Design of Class F Power Amplifier for 2.4ghz using Third Harmonics

International Journal of Recent Technology and Engineering - 2 ◽

10.35940/ijrte.c6130.098319 ◽

2019 ◽

Vol 8 (3) ◽

pp. 7370-7375

Keyword(s):

Power Amplifier ◽

Large Scale ◽

High Efficiency ◽

Supply Voltage ◽

Travelling Wave ◽

Input Power ◽

Engineering Research ◽

Power Added Efficiency ◽

Amplification Process ◽

Class F

Historically, travelling wave tube amplifier (TWTA) has been a common type of Microwave amplifier used commonly in terrestrial and space application due to their high efficiency and power handling capacity. However due to their bulky nature and also being very expensive, it is difficult to use them commercially in a large scale. Inspired by the advantage such as very less development cost, minimum supply voltage, gradual degradation and numerous commercial applications, Solid State Power Amplifier (SSPA) has been the replacement to vacuum tube Technology. The efficiency of the amplifier is one of the most important task in the microwave engineering research. An important figure of merit, power-added efficiency (PAE), is the main focus. Hence in this paper, class F Power amplifier is designed for 2.4GHz frequency. Class F Amplifier is also called as wave shaping amplifier since the harmonics generated helps the amplification process. The class f PA is biased nearer to the class B amplifier (close cut-off area) so the transistor can move back and forth rapidly to produce the harmonics. The efficiency of class F amplifier depends on how many harmonics are used for the amplification process. Here, the amplification process is performed up to the third harmonics which provides 41.606 dBm output power with 27dBm input power. Also a gain of more than 20.277dBm is achieved when the input given is 27dBm. Several other results like reflection Coefficient and transmission coefficient simulations has also been provided with the power added efficiency (PAE) of 75.402 achieved has also been simulated.

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A Design Methodology and Analysis for Transformer-Based Class-E Power Amplifier

Electronics ◽

10.3390/electronics8050494 ◽

2019 ◽

Vol 8 (5) ◽

pp. 494 ◽

Cited By ~ 1

Author(s):

Alfred Lim ◽

Aaron Tan ◽

Zhi-Hui Kong ◽

Kaixue Ma

Keyword(s):

Output Power ◽

Power Amplifier ◽

Design Methodology ◽

Design Procedure ◽

Cmos Process ◽

Process Technology ◽

Power Added Efficiency ◽

Optimum Operation ◽

Load Network ◽

Class E

This paper proposes a new technique and design methodology on a transformer-based Class-E complementary metal-oxide-semiconductor (CMOS) power amplifier (PA) with only one transformer and two capacitors in the load network. An analysis of this amplifier is presented together with an accurate and simple design procedure. The experimental results are in good agreement with the theoretical analysis. The following performance parameters are determined for optimum operation: The current and voltage waveform, the peak value of drain current and drain-to-source voltage, the output power, the efficiency and the component values of the load network are determined to be essential for optimum operation. The measured drain efficiency (DE) and power-added efficiency (PAE) is over 70% with 10-dBm output power at 2.4 GHz, using a 65 nm CMOS process technology.

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A Class-E Tuned W-Band SiGe Power Amplifier With 40.4% Power-Added Efficiency at 93 GHz

IEEE Microwave and Wireless Components Letters ◽

10.1109/lmwc.2015.2463231 ◽

2015 ◽

Vol 25 (10) ◽

pp. 663-665 ◽

Cited By ~ 15

Author(s):

Peter Song ◽

Michael A. Oakley ◽

A. Cagri Ulusoy ◽

Mehmet Kaynak ◽

Bernd Tillack ◽

...

Keyword(s):

Power Amplifier ◽

Power Added Efficiency ◽

W Band ◽

Class E

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A fully matched dual stage CMOS power amplifier with integrated passive linearizer attaining 23 db gain, 40% PAE and 28 DBM OIP3

Microelectronics International ◽

10.1108/mi-01-2021-0008 ◽

2021 ◽

Vol ahead-of-print (ahead-of-print) ◽

Author(s):

Premmilaah Gunasegaran ◽

Jagadheswaran Rajendran ◽

Selvakumar Mariappan ◽

Yusman Mohd Yusof ◽

Zulfiqar Ali Abdul Aziz ◽

...

Keyword(s):

Power Consumption ◽

Output Power ◽

Power Amplifier ◽

Maximum Output Power ◽

Maximum Output ◽

Power Gain ◽

Matching Network ◽

Content Type ◽

Power Added Efficiency ◽

Main Amplifier

Purpose The purpose of this paper is to introduce a new linearization technique known as the passive linearizer technique which does not affect the power added efficiency (PAE) while maintaining a power gain of more than 20 dB for complementary metal oxide semiconductor (CMOS) power amplifier (PA). Design/methodology/approach The linearization mechanism is executed with an aid of a passive linearizer implemented at the gate of the main amplifier to minimize the effect of Cgs capacitance through the generation of opposite phase response at the main amplifier. The inductor-less output matching network presents an almost lossless output matching network which contributes to high gain, PAE and output power. The linearity performance is improved without the penalty of power consumption, power gain and stability. Findings With this topology, the PA delivers more than 20 dB gain for the Bluetooth Low Energy (BLE) Band from 2.4 GHz to 2.5 GHz with a supply headroom of 1.8 V. At the center frequency of 2.45 GHz, the PA exhibits a gain of 23.3 dB with corresponding peak PAE of 40.11% at a maximum output power of 14.3 dBm. At a maximum linear output power of 12.7 dBm, a PAE of 37.3% has been achieved with a peak third order intermodulation product of 28.04 dBm with a power consumption of 50.58 mW. This corresponds to ACLR of – 20 dBc, thus qualifying the PA to operate for BLE operation. Practical implications The proposed technique is able to boost up the efficiency and output power, as well as linearize the PA closer to 1 dB compression point. This reduces the trade-off between linear output power and PAE in CMOS PA design. Originality/value The proposed CMOS PA can be integrated comfortably to a BLE transmitter, allowing it to reduce the transceiver’s overall power consumption.

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A 2.5-GHz 1-V High Efficiency CMOS Power Amplifier IC with a Dual-Switching Transistor and Third Harmonic Tuning Technique

Electronics ◽

10.3390/electronics8010069 ◽

2019 ◽

Vol 8 (1) ◽

pp. 69 ◽

Cited By ~ 3

Author(s):

Taufiq Alif Kurniawan ◽

Toshihiko Yoshimasu

Keyword(s):

Power Amplifier ◽

High Efficiency ◽

Low Voltage ◽

Supply Voltage ◽

Drain Current ◽

Cmos Technology ◽

Back Gate ◽

Third Harmonic ◽

Power Added Efficiency ◽

Switching Transistor

This paper presents a 2.5-GHz low-voltage, high-efficiency CMOS power amplifier (PA) IC in 0.18-µm CMOS technology. The combination of a dual-switching transistor (DST) and a third harmonic tuning technique is proposed. The DST effectively improves the gain at the saturation power region when the additional gain extension of the secondary switching transistor compensates for the gain compression of the primary one. To achieve high-efficiency performance, the third harmonic tuning circuit is connected in parallel to the output load. Therefore, the flattened drain current and voltage waveforms are generated, which in turn reduce the overlapping and the dc power consumption significantly. In addition, a 0.5-V back-gate voltage is applied to the primary switching transistor to realize the low-voltage operation. At 1 V of supply voltage, the proposed PA has achieved a power added efficiency (PAE) of 34.5% and a saturated output power of 10.1 dBm.

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Design of a Miniaturized Class F Power Amplifier Using Capacitor Loaded Transmission Lines

Frequenz ◽

10.1515/freq-2019-0180 ◽

2020 ◽

Vol 74 (3-4) ◽

pp. 145-152

Author(s):

Ali Pirasteh ◽

Saeed Roshani ◽

Sobhan Roshani

Keyword(s):

Power Amplifier ◽

Mobile Communications ◽

Transmission Lines ◽

Low Voltage ◽

Good Choice ◽

Band Frequency ◽

Power Added Efficiency ◽

Harmonic Control ◽

Measurement Results ◽

Class F

AbstractIn this paper, a new method to decrease the dimensions of the microstrip structures and reducing the overall size of the class F amplifiers is presented. First, by using the PHEMT transistor with a conventional harmonic control circuit (HCC), a low-voltage class F amplifier in the L band frequency at the operating frequency of 1.75 GHz is introduced, which named primitive class F power amplifier. Then, this amplifier is optimized by using capacitor loaded transmission lines (CLTLs). The measurement results of the amplifier show that by using the CLTL structure, the overall size has been reduced 85% (0.23 λg × 0.17 λg). The maximum power-added efficiency (PAE) of the power amplifier is about 77.5 % and the power gain which has been reached to 18.33 dB. The desirable features of this power amplifier, along with its very small size, make this power amplifier a good choice to use for the global system for mobile communications.

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Design of Broadband GaN HEMT Power Amplifier with Ku Band

Applied Mechanics and Materials ◽

10.4028/www.scientific.net/amm.263-266.39 ◽

2012 ◽

Vol 263-266 ◽

pp. 39-42 ◽

Cited By ~ 3

Author(s):

Zhi Qun Cheng ◽

Li Wei Jin ◽

Wen Shi

Keyword(s):

Output Power ◽

Power Amplifier ◽

Operating Conditions ◽

Power Gain ◽

Power Added Efficiency ◽

Gan Hemt ◽

Dc Bias ◽

Simulation Results ◽

Two Stages ◽

Ku Band

A broadband power amplifier module based on GaN HEMT operating Ku band is designed. TGF2023-02 Chip of GaN HEMT from TriQuint is modeled first. And then the module consists of two stages amplifiers. The first stage amplifier is single-stage amplifier and the second is two-way combiner amplifier. Wilkinson power divider, DC bias circuits and microstrip matching circuits are simulated and designed carefully. Simulation results showed that the amplifier module exhibits a power gain of 7 dB, power added efficiency of 13.9%, and an output power of 16 W under Vds=28 V, Vgs=-3.6 V, CW operating conditions at the frequency of 15 GHz.

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