Fully‐integrated high‐speed IM for improving high‐power marine engines

In this study, we propose a non-contact 80 kW, 60,000 rpm coaxial magnetic gear (CMG) model for high speed and high power applications. Two models with the same power but different radial and axial sizes were optimized using response surface methodology. Both models employed a Halbach array to increase torque. Also, an edge fillet was applied to the radial magnetized permanent magnet to reduce torque ripple, and an axial gap was applied to the permanent magnet with a radial gap to reduce eddy current loss. The models were analyzed using 2-D and 3-D finite element analysis. The torque, torque ripple and eddy current loss were compared in both models according to the materials used, including Sm2Co17, NdFeBs (N42SH, N48SH). Also, the structural stability of the pole piece structure was investigated by forced vibration analysis. Critical speed results from rotordynamics analysis are also presented.

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High-speed non-invasive thermal analysis of high-power light-emitting diode arrays

10.32469/10355/8133 ◽

2010 ◽

Author(s):

Nicholas M. Rada

Keyword(s):

Thermal Analysis ◽

High Power ◽

High Speed ◽

Light Emitting Diode ◽

Light Emitting ◽

Non Invasive

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High-speed and camera based temperature measurement and control for high power laser scanning systems

Pacific International Conference on Applications of Lasers and Optics ◽

10.2351/1.5056938 ◽

2006 ◽

Author(s):

Marko Seifert ◽

Steffen Bonss ◽

Stefan Kühn ◽

Berndt Brenner ◽

Eckhard Beyer

Keyword(s):

Temperature Measurement ◽

High Power ◽

High Speed ◽

Laser Scanning ◽

High Power Laser ◽

Power Laser ◽

And Control ◽

Measurement And Control ◽

Scanning Systems

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Parabolic mirror adapted-alignment for high speed-high power laser welding with an oblong focused beam spot

10.2351/1.5059722 ◽

1997 ◽

Cited By ~ 2

Author(s):

J. C. Mombo-Caristan ◽

R. E. Mueller ◽

C. M. Sharp ◽

M. H. McCay

Keyword(s):

Laser Welding ◽

High Power ◽

High Speed ◽

Parabolic Mirror ◽

High Power Laser ◽

Power Laser ◽

Beam Spot ◽

Focused Beam

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High-Speed Photodetectors: Self-Biasing and High-Power Behaviour

ECS Transactions ◽

10.1149/1.3104705 ◽

2019 ◽

Vol 16 (41) ◽

pp. 9-15

Author(s):

Heinz-Gunter Bach

Keyword(s):

High Power ◽

High Speed

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A 1.55-to-32-Gb/s Four-Lane Transmitter with 3-Tap Feed Forward Equalizer and Shared PLL in 28-nm CMOS

Electronics ◽

10.3390/electronics10161873 ◽

2021 ◽

Vol 10 (16) ◽

pp. 1873

Author(s):

Chen Cai ◽

Xuqiang Zheng ◽

Yong Chen ◽

Danyu Wu ◽

Jian Luan ◽

...

Keyword(s):

Data Transmission ◽

High Speed ◽

Data Rate ◽

Quality Data ◽

Cmos Process ◽

Voltage Controlled Oscillator ◽

Feed Forward ◽

Fully Integrated ◽

Output Driver ◽

28 Nm

This paper presents a fully integrated physical layer (PHY) transmitter (TX) suiting for multiple industrial protocols and compatible with different protocol versions. Targeting a wide operating range, the LC-based phase-locked loop (PLL) with a dual voltage-controlled oscillator (VCO) was integrated to provide the low jitter clock. Each lane with a configurable serialization scheme was adapted to adjust the data rate flexibly. To achieve high-speed data transmission, several bandwidth-extended techniques were introduced, and an optimized output driver with a 3-tap feed-forward equalizer (FFE) was proposed to accomplish high-quality data transmission and equalization. The TX prototype was fabricated in a 28-nm CMOS process, and a single-lane TX only occupied an active area of 0.048 mm2. The shared PLL and clock distribution circuits occupied an area of 0.54 mm2. The proposed PLL can support a tuning range that covers 6.2 to 16 GHz. Each lane's data rate ranged from 1.55 to 32 Gb/s, and the energy efficiency is 1.89 pJ/bit/lane at a 32-Gb/s data rate and can tune an equalization up to 10 dB.

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In-Plane Monolithic Integration of Scaled III-V Photonic Devices

Applied Sciences ◽

10.3390/app11041887 ◽

2021 ◽

Vol 11 (4) ◽

pp. 1887

Author(s):

Markus Scherrer ◽

Noelia Vico Triviño ◽

Svenja Mauthe ◽

Preksha Tiwari ◽

Heinz Schmid ◽

...

Keyword(s):

Integrated Circuits ◽

High Speed ◽

Low Cost ◽

Photonic Devices ◽

Monolithic Integration ◽

Light Emitters ◽

Fully Integrated ◽

Large Lattice ◽

Hybrid Iii ◽

Gain Material

It is a long-standing goal to leverage silicon photonics through the combination of a low-cost advanced silicon platform with III-V-based active gain material. The monolithic integration of the III-V material is ultimately desirable for scalable integrated circuits but inherently challenging due to the large lattice and thermal mismatch with Si. Here, we briefly review different approaches to monolithic III-V integration while focusing on discussing the results achieved using an integration technique called template-assisted selective epitaxy (TASE), which provides some unique opportunities compared to existing state-of-the-art approaches. This method relies on the selective replacement of a prepatterned silicon structure with III-V material and thereby achieves the self-aligned in-plane monolithic integration of III-Vs on silicon. In our group, we have realized several embodiments of TASE for different applications; here, we will focus specifically on in-plane integrated photonic structures due to the ease with which these can be coupled to SOI waveguides and the inherent in-plane doping orientation, which is beneficial to waveguide-coupled architectures. In particular, we will discuss light emitters based on hybrid III-V/Si photonic crystal structures and high-speed InGaAs detectors, both covering the entire telecom wavelength spectral range. This opens a new path towards the realization of fully integrated, densely packed, and scalable photonic integrated circuits.

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