The shift of breakdown voltage for silicon membrane strip detectors resulting from surface avalanche

2021 ◽  
Vol 129 (21) ◽  
pp. 214501
Author(s):  
W. Peng ◽  
I. Sabri Alirezaei ◽  
N. André ◽  
X. Zeng ◽  
M. Bouterfa ◽  
...  
Author(s):  
Philip D. Hren

The pattern of bend contours which appear in the TEM image of a bent or curled sample indicates the shape into which the specimen is bent. Several authors have characterized the shape of their bent foils by this method, most recently I. Bolotov, as well as G. Möllenstedt and O. Rang in the early 1950’s. However, the samples they considered were viewed at orientations away from a zone axis, or at zone axes of low symmetry, so that dynamical interactions between the bend contours did not occur. Their calculations were thus based on purely geometric arguments. In this paper bend contours are used to measure deflections of a single-crystal silicon membrane at the (111) zone axis, where there are strong dynamical effects. Features in the bend contour pattern are identified and associated with a particular angle of bending of the membrane by reference to large-angle convergent-beam electron diffraction (LACBED) patterns.


2018 ◽  
Vol 138 (8) ◽  
pp. 441-448 ◽  
Author(s):  
Norimitsu Takamura ◽  
Nobutaka Araoka ◽  
Seiya Kamohara ◽  
Yuta Hino ◽  
Takuya Beppu ◽  
...  

Author(s):  
Nobuyuki Wakai ◽  
Yuji Kobira ◽  
Hidemitsu Egawa ◽  
Masayoshi Tsutsumi

Abstract Fundamental consideration for CDM (Charged Device Model) breakdown was investigated with 90nm technology products and others. According to the result of failure analysis, it was found that gate oxide breakdown was critical failure mode for CDM test. High speed triggered protection device such as ggNMOS and SCR (Thyristor) is effective method to improve its CDM breakdown voltage and an improvement for evaluated products were confirmed. Technological progress which is consisted of down-scaling of protection device size and huge number of IC pins of high function package makes technology vulnerable and causes significant CDM stress. Therefore, it is expected that CDM protection designing tends to become quite difficult. In order to solve these problems in the product, fundamental evaluations were performed. Those are a measurement of discharge parameter and stress time dependence of CDM breakdown voltage. Peak intensity and rise time of discharge current as critical parameters are well correlated their package capacitance. Increasing stress time causes breakdown voltage decreasing. This mechanism is similar to that of TDDB for gate oxide breakdown. Results from experiences and considerations for future CDM reliable designing are explained in this report.


1993 ◽  
Vol 29 (15) ◽  
pp. 1381 ◽  
Author(s):  
B.R. Kang ◽  
S.N. Yoon ◽  
Y.H. Cho ◽  
S.I. Cha ◽  
Y.I. Choi

2019 ◽  
Vol 8 (7) ◽  
pp. Q3229-Q3234 ◽  
Author(s):  
Yen-Ting Chen ◽  
Jiancheng Yang ◽  
Fan Ren ◽  
Chin-Wei Chang ◽  
Jenshan Lin ◽  
...  

2013 ◽  
Vol 347-350 ◽  
pp. 1535-1539
Author(s):  
Jian Jun Zhou ◽  
Liang Li ◽  
Hai Yan Lu ◽  
Ceng Kong ◽  
Yue Chan Kong ◽  
...  

In this letter, a high breakdown voltage GaN HEMT device fabricated on semi-insulating self-standing GaN substrate is presented. High quality AlGaN/GaN epilayer was grown on self-standing GaN substrate by metal organic chemical vapor deposition. A 0.8μm gate length GaN HEMT device was fabricated with oxygen plasma treatment. By using oxygen plasma treatment, gate forward working voltage is increased, and a breakdown voltage of more than 170V is demonstrated. The measured maximum drain current of the device is larger than 700 mA/mm at 4V gate bias voltage. The maximum transconductance of the device is 162 mS/mm. In addition, high frequency performance of the GaN HEMT device is also obtained. The current gain cutoff frequency and power gain cutoff frequency are 19.7 GHz and 32.8 GHz, respectively. A high fT-LG product of 15.76 GHzμm indicating that homoepitaxy technology is helpful to improve the frequency performance of the device.


Sensors ◽  
2021 ◽  
Vol 21 (16) ◽  
pp. 5287
Author(s):  
Hiwa Mahmoudi ◽  
Michael Hofbauer ◽  
Bernhard Goll ◽  
Horst Zimmermann

Being ready-to-detect over a certain portion of time makes the time-gated single-photon avalanche diode (SPAD) an attractive candidate for low-noise photon-counting applications. A careful SPAD noise and performance characterization, however, is critical to avoid time-consuming experimental optimization and redesign iterations for such applications. Here, we present an extensive empirical study of the breakdown voltage, as well as the dark-count and afterpulsing noise mechanisms for a fully integrated time-gated SPAD detector in 0.35-μm CMOS based on experimental data acquired in a dark condition. An “effective” SPAD breakdown voltage is introduced to enable efficient characterization and modeling of the dark-count and afterpulsing probabilities with respect to the excess bias voltage and the gating duration time. The presented breakdown and noise models will allow for accurate modeling and optimization of SPAD-based detector designs, where the SPAD noise can impose severe trade-offs with speed and sensitivity as is shown via an example.


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