Investigation of solder beading phenomenon under surface-mounted electrolytic capacitors

2022 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Daniel Straubinger ◽  
Attila Toth ◽  
Viktor Kerek ◽  
Zsolt Czeczei ◽  
Andras Szabo ◽  
...  
Keyword(s):  
Optical Microscopy ◽  
High Reliability ◽  
Primary Source ◽  
Circuit Board ◽  
Solder Paste ◽  
Reflow Soldering ◽  
Content Type ◽  
X Ray ◽  
Electrolytic Capacitors ◽  
Component Design

Purpose The purpose of this paper is to study the solder beading phenomenon (referring to larger-sized solder balls) of surface-mounted electrolytic capacitors. Solder beading could induce failures by violating the minimal electrical clearance on the printed circuit board (PCB). In modern lead-free reflow soldering, especially in high-reliability industries, such as automotive, aeroplane and aerospace, detecting and preventing such defects is essential in reliable and cost-effective manufacturing. Design/methodology/approach The large size of the involved components may block the view of automatic optical inspection; therefore, X-ray inspection is necessary. To detect the failure mode, X-ray imaging, cross-section grinding, optical microscopy and Fourier transformed infrared spectroscopy were used. High-resolution noncontact profilometry and optical microscopy were used to analyse component designs. The surface mounting process steps were also analysed to reveal their dependence on the issue. Test methods were designed and performed to reveal the behaviour of the solder paste (SP) during the reflow soldering process and to emphasise the component design relevance. Findings It was found that the reduction of SP volume only reduces the failure rate but does not solve the problem. Results show that excessive component placement pressure could induce solder beading. Statistical analysis revealed that differences between distinct components had the highest effect on the solder beading rate. Design aspects of solder beading-prone components were identified and discussed as the primary source of the problem. Practical implications The findings can be applied in surface-mount technology production, where the total failure count and resulting failure costs could be reduced according to the findings. Originality/value This paper shows that component design aspects such as the low distance between the underside of the component and the PCB and blocked proper outgassing of volatile compounds of the SP can be root causes of solder beading under surface-mounted electrolytic capacitors.

X-ray inspection and Six-Sigma in analysis of LED thermal pad coverage

2017 ◽  
Vol 29 (1) ◽  
pp. 28-33 ◽  
Author(s):  
Barbara Dziurdzia ◽  
Janusz Mikolajek
Keyword(s):  
Six Sigma ◽  
Vapour Phase ◽  
Inspection System ◽  
Solder Paste ◽  
Process Variables ◽  
Reflow Soldering ◽  
Content Type ◽  
X Ray ◽  
Solder Pastes ◽  
Free Solder

Purpose The purpose of this paper is to evaluate selected methods of reduction voidings in lead-free solder joints underneath thermal pads of light-emitting diodes (LEDs), using X-ray inspection and Six Sigma methodology. Design/methodology/approach On the basis of cause and effect diagram for solder voiding, the potential causes of voids and influence of process variables on void formation were found. Three process variables were chosen: the type of reflow soldering, vacuum incorporation and the type of solder paste. Samples of LEDs were mounted with convection and vapour phase reflow soldering. Vacuum was incorporated into vapour phase soldering. Two types of solder pastes OM338PT and LFS-216LT were used. Algorithm incorporated into X-ray inspection system enabled to calculate the statistical distribution of LED thermal pad coverage and to find the process capability index (Cpk) of applied soldering techniques. Findings The evaluation of selected soldering processes of LEDs in respect of their thermal pad coverage and statistical Cpk indices is presented. Vapour-phase soldering with vacuum is capable (Cpk > 1) for OM338PT and LFS-216LT paste. Convection reflow without vacuum with LFS-216LT paste is also capable (Cpk = 1.1). Other technological soldering processes require improvements. Vacuum improves radically the capability of a reflow soldering for an LED assembly. When vacuum is not accessible, some improvement of capability to a lower extent is possible by an application of void-free solder pastes. Originality/value Six Sigma statistical methodology combined with X-ray diagnosis was used to check whether applied methods of void reduction underneath LED thermal pads are capable processes.

Experimental approach to thermal conductivity of macro solder joints with voids

2019 ◽  
Vol 31 (3) ◽  
pp. 181-191 ◽  
Author(s):  
Maciej Sobolewski ◽  
Barbara Dziurdzia
Keyword(s):  
Thermal Conductivity ◽  
Solder Joint ◽  
Solder Joints ◽  
Copper Plate ◽  
Circuit Board ◽  
Solder Paste ◽  
Reflow Soldering ◽  
Content Type ◽  
Copper Cylinder ◽  
The Impact

Purpose The purpose of the paper is to experimentally evaluate the impact of voids on thermal conductivity of a macro solder joint formed between a copper cylinder and a copper plate by using reflow soldering. Design/methodology/approach A model of a surface mount device (SMD) was developed in the shape of a cylinder. A copper plate works as a printed circuit board (PCB). The resistor was connected to a power supply and the plate was cooled by a heat sink and a powerful fan. A macro solder joint was formed between a copper cylinder and a copper plate using reflow soldering and a lead-free solder paste SAC305. The solder paste was printed on a plate through stencils of various apertures. It was expected that various apertures of stencils will moderate the various void contents in solder joints. K-type thermocouples mounted inside cylinders and at the bottom of a plate underneath the cylinders measured the temperature gradient on both sides of the solder joint. After finishing the temperature measurements, the cylinders were thinned by milling to thickness of about 2 mm and then X-ray images were taken to evaluate the void contents. Finally the tablets were cross-sectioned to enable scanning electron microscopy (SEM) observations. Findings There was no clear dependence between thermal conductivity of solder joints and void contents. The authors state that other factors such as intermetallic layers, microcracks, crystal grain morfologyof the interface between the solder and the substrate influence on thermal conductivity. To support this observation, further investigations using metallographic methods are required. Originality/value Results allow us to assume that the use of SAC305 alloy for soldering of components with high thermal loads is risky. The common method for thermal balance calculation is based on the sum of serial thermal resistances of mechanical compounds. For these calculations, solder joints are represented with bulk SAC305 thermal conductivity parameters. Thermal conductivity of solder joints for high density of thermal energy is much lower than expected. Solder joints’ structure is not fully comparable with bulk SAC305 alloy. In experiments, the average value of the solder joint conductivity was found to be 8.1 W/m·K, which is about 14 per cent of the nominal value of SAC305 thermal conductivity.

scholarly journals Head-on-Pillow Defect Detection: X-Ray Inspection Limitations

2019 ◽  
Vol 16 (2) ◽  
pp. 91-102
Author(s):  
Lars Bruno ◽  
Benny Gustafson
Keyword(s):  
Solder Joints ◽  
Solder Paste ◽  
Wafer Level ◽  
Reflow Soldering ◽  
X Ray ◽  
Soldering Process ◽  
Irregular Shapes ◽  
Fine Pitch ◽  
Solder Balls ◽  
Ball Grid Array Packages

Abstract Both the number and the variants of ball grid array packages (BGAs) are tending to increase on network printed board assemblies with sizes ranging from a few millimeter die size wafer level packages with low ball count to large multidie system-in-package (SiP) BGAs with 60–70 mm side lengths and thousands of I/Os. One big challenge, especially for large BGAs, SiPs, and for thin fine-pitch BGA assemblies, is the dynamic warpage during the reflow soldering process. This warpage could lead to solder balls losing contact with the solder paste and its flux during parts of the soldering process, and this may result in solder joints with irregular shapes, indicating poor or no coalescence between the added solder and the BGA balls. This defect is called head-on-pillow (HoP) and is a failure type that is difficult to determine. In this study, x-ray inspection was used as a first step to find deliberately induced HoP defects, followed by prying off of the BGAs to verify real HoP defects and the fault detection correlation between the two methods. The result clearly shows that many of the solder joints classified as potential HoP defects in the x-ray analysis have no evidence at all of HoP after pry-off. This illustrates the difficulty of determining where to draw the line between pass and fail for HoP defects when using x-ray inspection.

SAC–xTiO2 nano-reinforced lead-free solder joint characterizations in ultra-fine package assembly

2018 ◽  
Vol 30 (1) ◽  
pp. 1-13 ◽  
Author(s):  
Fakhrozi Che Ani ◽  
Azman Jalar ◽  
Abdullah Aziz Saad ◽  
Chu Yee Khor ◽  
Roslina Ismail ◽  
...  
Keyword(s):  
Electron Microscope ◽  
Solder Joint ◽  
Solder Joints ◽  
Ion Beam ◽  
Lead Free ◽  
Lead Free Solder ◽  
Solder Paste ◽  
Content Type ◽  
X Ray ◽  
Free Solder

Purpose This paper aims to investigate the characteristics of ultra-fine lead-free solder joints reinforced with TiO2 nanoparticles in an electronic assembly. Design/methodology/approach This study focused on the microstructure and quality of solder joints. Various percentages of TiO2 nanoparticles were mixed with a lead-free Sn-3.5Ag-0.7Cu solder paste. This new form of nano-reinforced lead-free solder paste was used to assemble a miniature package consisting of an ultra-fine capacitor on a printed circuit board by means of a reflow soldering process. The microstructure and the fillet height were investigated using a focused ion beam, a high-resolution transmission electron microscope system equipped with an energy dispersive X-ray spectrometer (EDS), and a field emission scanning electron microscope coupled with an EDS and X-ray diffraction machine. Findings The experimental results revealed that the intermetallic compound with the lowest thickness was produced by the nano-reinforced solder with a TiO2 content of 0.05 Wt.%. Increasing the TiO2 content to 0.15 Wt.% led to an improvement in the fillet height. The characteristics of the solder joint fulfilled the reliability requirements of the IPC standards. Practical implications This study provides engineers with a profound understanding of the characteristics of ultra-fine nano-reinforced solder joint packages in the microelectronics industry. Originality/value The findings are expected to provide proper guidelines and references with regard to the manufacture of miniaturized electronic packages. This study also explored the effects of TiO2 on the microstructure and the fillet height of ultra-fine capacitors.

The behaviour of solder pastes in stencil printing with electropolishing process

2013 ◽  
Vol 25 (3) ◽  
pp. 164-174 ◽  
Author(s):  
Yong‐Won Lee ◽  
Keun‐Soo Kim ◽  
Katsuaki Suganuma
Keyword(s):  
Circuit Board ◽  
Surface Finishing ◽  
Design Parameters ◽  
Solder Paste ◽  
Stencil Printing ◽  
Printing Process ◽  
Content Type ◽  
Solder Paste Printing ◽  
Solder Mask

PurposeThe purpose of this paper is to study the effect of the electropolishing time of stencil manufacturing parameters and solder‐mask definition methods of PCB pad design parameters on the performance of solder paste stencil printing process for the assembly of 01005 chip components.Design/methodology/approachDuring the study, two types of stencils were manufactured for the evaluations: electroformed stencils and electropolished laser‐cut stencils. The electroformed stencils were manufactured using the standard electroforming process and their use in the paste printing process was compared against the use of an electropolished laser‐cut stencil. The electropolishing performance of the laser‐cut stencil was evaluated twice at the following intervals: 100 s and 200 s. The performance of the laser‐cut stencil was also evaluated without electropolishing. An optimized process was established after the polished stencil apertures of the laser‐cut stencil were inspected. The performance evaluations were made by visually inspecting the quality of the post‐surface finishing for the aperture wall and the quality of that post‐surface finishing was further checked using a scanning electron microscope. A test board was used in a series of designed experiments to evaluate the solder paste printing process.FindingsThe results demonstrated that the length of the electropolishing time had a significant effect on the small stencil's aperture quality and the solder paste's stencil printing performance. In this study, the most effective electropolishing time was 100 s for a stencil thickness of 0.08 mm. The deposited solder paste thickness was significantly better for the enhanced laser‐cut stencil with electropolishing compared to the conventional electroformed stencils. In this printing‐focused work, print paste thickness measurements were also found to vary across different solder‐mask definition methods of printed circuit board pad designs with no change in the size of the stencil aperture. The highest paste value transfer consistently occurred with solder‐mask‐defined pads, when an electropolished laser‐cut stencil was used.Originality/valueDue to important improvements in the quality of the electropolished laser‐cut stencil, and based on the results of this experiment, the electropolished laser‐cut stencil is strongly recommended for the solder paste printing of fine‐pitch and miniature components, especially in comparison to the typical laser‐cut stencil. The advantages of implementing a 01005 chip component mass production assembly process include excellent solder paste release, increased solder volume, good manufacture‐ability, fast turnaround time, and greater cost saving opportunities.

Voiding Control at Preform Soldering

2016 ◽  
Vol 2016 (1) ◽  
pp. 000630-000637
Author(s):  
Arnab Dasgupta ◽  
Elaina Zito ◽  
Ning-Cheng Lee
Keyword(s):  
High Power ◽  
High Performance ◽  
High Reliability ◽  
Solder Paste ◽  
Reflow Soldering ◽  
High Brightness ◽  
Die Attach ◽  
Alloy Type ◽  
Reflow Temperature ◽  
Bondline Thickness

Abstract Assembly of components with large pads such as high brightness LEDs or high power dies often is soldered with preform, mainly due to a lower voiding and lower flux fume generated when compared with solder paste, and also because of its better thermal and electrical conductivity compared with Ag epoxy. This is particularly true when the joints are to be formed within a cavity. Although lower than solder paste, the voiding in the solder joint is still a concern for high reliability and high performance devices. In this study, voiding at high power die attach reflow soldering using preform was simulated with the use of Cu coupons to mimic both die and substrate. The voiding behavior was studied by varying solder alloy type, flux quantity coated on preform, oxidation extent of Cu coupon, reflow peak temperature, and weight applied on the top of simulated die. For SAC305, with increasing weight, the bondline thickness (BLT) maintained constant initially due to solder surface tension, then reduced rapidly at weight higher than 50 g. The voiding area % increased with decreasing BLT first, then levelled off at lower BLT, although the voiding volume decreased with decreasing BLT due to constrained lamellar solder flow. Voiding was the highest for SAC305, followed by 57Bi42Sn1Ag, with 63Sn37Pb being the lowest, and increased with increasing oxidation of Cu coupon. With increasing flux quantity, voiding increased for SAC305 and 63Sn37Pb, but decreased for 57Bi42Sn1Ag, mainly due to the different temperature range at reflow. Voiding increased with increasing reflow temperature up to 170°C due to increasing vaporization, decreased with further increase in reflow temperature up to 210°C due to increasing flux activity, and increased again at temperature beyond 210°C due to rapid flux outgassing.

Investigating and compensating printed circuit board shrinkage induced failures during reflow soldering

2015 ◽  
Vol 27 (2) ◽  
pp. 61-68 ◽  
Author(s):  
Attila Geczy ◽  
Márta Fejos ◽  
László Tersztyánszky
Keyword(s):  
Efficient Method ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Automotive Electronics ◽  
Production Environment ◽  
Reflow Soldering ◽  
Content Type ◽  
Printed Circuit ◽  
Novel Approach ◽  
The Given

Purpose – This paper aims to reveal the causes and find an efficient method to compensate the shrinkage to reduce failure costs. Reflow-induced printed circuit board (PCB) shrinkage is inspected in automotive electronics production environment. The shrinkage of two-sided, large PCBs results in printing offset errors and consequently soldering failures on smaller components during the reflow soldering of the second PCB side. Design/methodology/approach – During the research, the investigations had to adapt to actual production in an electronics manufacturing plant. A measurement method was developed to approximate the overall shrinkage of the given product. With the shrinkage data, it is possible to perform an efficient compensation on the given stencil design in computer-aided manufacturing environment. Findings – It was found that even with the investigated lower-quality PCB materials, the compensation on the stencil significantly reduces the quantity of failures, offering an efficient method to improve the yield of the production. Research limitations/implications – Research was oriented by the confines of production (fixed PCB sources, given PCB materials, reflow process and production line), where an immediate solution is needed. Future investigations should be focussed on the PCB parameters (different epoxy types, glass-fibre reinforcements, etc.). Practical implications – The optimised production reduces overall failure costs. The stencil re-design and application is a fast and efficient way to immediately act against the shrinkage-induced failures. The method was successfully applied in automotive electronics production. Originality/value – The paper presents a novel approach on solving an emerging problem during reflow.

Characterization of SAC – x NiO nano-reinforced lead-free solder joint in an ultra-fine package assembly

2019 ◽  
Vol 31 (2) ◽  
pp. 109-124 ◽  
Author(s):  
Fakhrozi Che Ani ◽  
Azman Jalar ◽  
Abdullah Aziz Saad ◽  
Chu Yee Khor ◽  
Mohamad Aizat Abas ◽  
...  
Keyword(s):  
Electron Microscopy ◽  
Solder Joint ◽  
Lead Free ◽  
Inspection System ◽  
Lead Free Solder ◽  
Solder Paste ◽  
Nio Nanoparticles ◽  
Content Type ◽  
X Ray ◽  
Free Solder

Purpose This study aims to investigate the NiO nano-reinforced solder joint characteristics of ultra-fine electronic package. Design/methodology/approach Lead-free Sn-Ag-Cu (SAC) solder paste was mixed with various percentages of NiO nanoparticles to prepare the new form of nano-reinforced solder paste. The solder paste was applied to assemble the ultra-fine capacitor using the reflow soldering process. A focussed ion beam, high resolution transmission electron microscopy system equipped with energy dispersive X-ray spectroscopy (EDS) was used in this study. In addition, X-ray inspection system, field emission scanning electron microscopy coupled with EDS, X-ray photoelectron spectroscopy (XPS) and nanoindenter were used to analyse the solder void, microstructure, hardness and fillet height of the solder joint. Findings The experimental results revealed that the highest fillet height was obtained with the content of 0.01 Wt.% of nano-reinforced NiO, which fulfilled the reliability requirements of the international IPC standard. However, the presence of the NiO in the lead-free solder paste only slightly influenced the changes of the intermetallic layer with the increment of weighted percentage. Moreover, the simulation method was applied to observe the distribution of NiO nanoparticles in the solder joint. Originality/value The findings are expected to provide a profound understanding of nano-reinforced solder joint’s characteristics of the ultra-fine package.

CONTROLLING AND OPTIMIZATION OF THERMAL PROFILE IN REFLOW SOLDERING

2009 ◽  
Vol 23 (06n07) ◽  
pp. 1949-1955
Author(s):  
JIANWEI SHI ◽  
PENG HE ◽  
XIAOCHUN LV
Keyword(s):  
Solder Joint ◽  
Circuit Board ◽  
Solder Paste ◽  
Thermal Profile ◽  
Reflow Soldering ◽  
Soldering Process ◽  
Joint Reliability ◽  
Controlling Parameter ◽  
Technical Evaluation ◽  
Reliability Of Solder Joints

Heating factor, Q is a quantitative parameter describing a process of reflow soldering. It can be used to evaluate a reflow soldering process and the reliability of solder joints. The value of Q is directly related to the energy absorbed by solder joint during heating and the morphology of Intermetallic Compound formed at the interface between solder and pad. Electronic product manufacturers use heating factor as a technical evaluation parameter to guide the adjustment of reflow soldering process and the optimization of reflow soldering curve, to ensure the best reliability of the circuit board. Solder paste manufacturers use heating factor to represent characteristics of their reflow soldering products, and to customize products according to consumer's requests. Equipment manufacturers for reflow soldering use heating factor as an important controlling parameter to establish automatic system for managing solder joint reliability. A reliable soldering result can be achieved using the automatic reflow management system, to control and optimize thermal profile, which leads to the adjustment of the heating factor.

Convection vs vapour phase reflow in LED and BGA assembly

2018 ◽  
Vol 30 (2) ◽  
pp. 87-99 ◽  
Author(s):  
Barbara Dziurdzia ◽  
Maciej Sobolewski ◽  
Janusz Mikolajek
Keyword(s):  
Statistical Analysis ◽  
Solder Joints ◽  
Void Formation ◽  
Vapour Phase ◽  
Distribution Data ◽  
Solder Paste ◽  
Content Type ◽  
X Ray ◽  
Bga Packages ◽  
Solder Balls

Purpose The aim of this paper is to evaluate using statistical methods how two soldering techniques – the convection reflow and vapour phase reflow with vacuum – influence reduction of voids in lead-free solder joints under Light Emitted Diodes (LEDs) and Ball Grid Arrays (BGAs). Design/methodology/approach Distribution of voids in solder joints under thermal and electrical pads of LEDs and in solder balls of BGAs assembled with convection reflow and vapour phase reflow with vacuum has been investigated in terms of coverage or void contents, void diameters and number of voids. For each soldering technology, 80 LEDs and 32 solder balls in BGAs were examined. Soldering processes were carried out in the industrial or semi-industrial environment. The OM340 solder paste of Innolot type was used for LED soldering. Voidings in solder joints were inspected with a 2D X-ray transmission system. OriginLab was used for statistical analysis. Findings Investigations supported by statistical analysis showed that the vapour phase reflow with vacuum decreases significantly void contents and number and diameters of voids in solder joints under LED and BGA packages when compared to convection reflow. Originality/value Voiding distribution data were collected on the basis of 2D X-ray images for test samples manufactured during the mass production processes. Statistical analysis enabled to appraise soldering technologies used in these processes in respect of void formation.

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