A Comprehensive Survey on Antennas On-Chip Based on Metamaterial, Metasurface, and Substrate Integrated Waveguide Principles for Millimeter-Waves and Terahertz Integrated Circuits and Systems

Abstract This paper presents the results of a study on improving the performance parameters such as the impedance bandwidth, radiation gain and efficiency, as well as suppressing substrate loss of an innovative antenna for on-chip implementation for millimetre-wave and terahertz integrated-circuits. This was achieved by using the metamaterial and the substrate-integrated waveguide (SIW) technologies. The on-chip antenna structure comprises five alternating layers of metallization and silicon. An array of circular radiation patches with metamaterial-inspired crossed-shaped slots are etched on the top metallization layer below which is a silicon layer whose bottom surface is metalized to create a ground plane. Implemented in the silicon layer below is a cavity above which is no ground plane. Underneath this silicon layer is where an open-ended microstrip feedline is located which is used to excite the antenna. The feed mechanism is based on the coupling of the electromagnetic energy from the bottom silicon layer to the top circular patches through the cavity. To suppress surface waves and reduce substrate loss, the SIW concept is applied at the top silicon layer by implementing the metallic via holes at the periphery of the structure that connect the top layer to the ground plane. The proposed on-chip antenna has an average measured radiation gain and efficiency of 6.9 dBi and 53%, respectively, over its operational frequency range from 0.285–0.325 THz. The proposed on-chip antenna has dimensions of 1.35 × 1 × 0.06 mm3. The antenna is shown to be viable for applications in millimetre-waves and terahertz integrated-circuits.

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A Brief Overview of On-Chip Voltage Regulation in High-Performance and High-Density Integrated Circuits

IEEE Access ◽

10.1109/access.2020.3047347 ◽

2021 ◽

Vol 9 ◽

pp. 813-826

Author(s):

Farid Uddin Ahmed ◽

Zarin Tasnim Sandhie ◽

Liaquat Ali ◽

Masud H. Chowdhury

Keyword(s):

Integrated Circuits ◽

High Performance ◽

Voltage Regulation ◽

High Density ◽

On Chip

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High-Performance On-Chip Silicon Beamsplitter Based on Subwavelength Metamaterials for Enhanced Fabrication Tolerance

Nanomaterials ◽

10.3390/nano11051304 ◽

2021 ◽

Vol 11 (5) ◽

pp. 1304

Author(s):

Raquel Fernández de Cabo ◽

David González-Andrade ◽

Pavel Cheben ◽

Aitor V. Velasco

Keyword(s):

Integrated Circuits ◽

Fundamental Mode ◽

High Performance ◽

Three Dimensional ◽

High Sensitivity ◽

Power Splitting ◽

Excess Loss ◽

Power Splitters ◽

On Chip ◽

Efficient Power

Efficient power splitting is a fundamental functionality in silicon photonic integrated circuits, but state-of-the-art power-division architectures are hampered by limited operational bandwidth, high sensitivity to fabrication errors or large footprints. In particular, traditional Y-junction power splitters suffer from fundamental mode losses due to limited fabrication resolution near the junction tip. In order to circumvent this limitation, we propose a new type of high-performance Y-junction power splitter that incorporates subwavelength metamaterials. Full three-dimensional simulations show a fundamental mode excess loss below 0.1 dB in an ultra-broad bandwidth of 300 nm (1400–1700 nm) when optimized for a fabrication resolution of 50 nm, and under 0.3 dB in a 350 nm extended bandwidth (1350–1700 nm) for a 100 nm resolution. Moreover, analysis of fabrication tolerances shows robust operation for the fundamental mode to etching errors up to ± 20 nm. A proof-of-concept device provides an initial validation of its operation principle, showing experimental excess losses lower than 0.2 dB in a 195 nm bandwidth for the best-case resolution scenario (i.e., 50 nm).

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From (integrated) circuits to systems of systems on chip in five decades: How did and will (IC) test technology keep up?

2007 50th Midwest Symposium on Circuits and Systems ◽

10.1109/mwscas.2007.4488835 ◽

2007 ◽

Cited By ~ 3

Author(s):

Andre Ivanov

Keyword(s):

Integrated Circuits ◽

Systems Of Systems ◽

Systems On Chip ◽

Test Technology ◽

On Chip ◽

Ic Test

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Interband Cascade Photonic Integrated Circuits on Native III-V Chip

Sensors ◽

10.3390/s21020599 ◽

2021 ◽

Vol 21 (2) ◽

pp. 599

Author(s):

Jerry R. Meyer ◽

Chul Soo Kim ◽

Mijin Kim ◽

Chadwick L. Canedy ◽

Charles D. Merritt ◽

...

Keyword(s):

Integrated Circuits ◽

Integrated Circuit ◽

Detection System ◽

Laser Cavity ◽

Building Blocks ◽

Drive Power ◽

Optical Elements ◽

Photonic Integrated Circuit ◽

Cleaved Facets ◽

On Chip

We describe how a midwave infrared photonic integrated circuit (PIC) that combines lasers, detectors, passive waveguides, and other optical elements may be constructed on the native GaSb substrate of an interband cascade laser (ICL) structure. The active and passive building blocks may be used, for example, to fabricate an on-chip chemical detection system with a passive sensing waveguide that evanescently couples to an ambient sample gas. A variety of highly compact architectures are described, some of which incorporate both the sensing waveguide and detector into a laser cavity defined by two high-reflectivity cleaved facets. We also describe an edge-emitting laser configuration that optimizes stability by minimizing parasitic feedback from external optical elements, and which can potentially operate with lower drive power than any mid-IR laser now available. While ICL-based PICs processed on GaSb serve to illustrate the various configurations, many of the proposed concepts apply equally to quantum-cascade-laser (QCL)-based PICs processed on InP, and PICs that integrate III-V lasers and detectors on silicon. With mature processing, it should become possible to mass-produce hundreds of individual PICs on the same chip which, when singulated, will realize chemical sensing by an extremely compact and inexpensive package.

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High Temperature High Current Gain IC Compatible 4H-SiC Phototransistor

Materials Science Forum ◽

10.4028/www.scientific.net/msf.963.832 ◽

2019 ◽

Vol 963 ◽

pp. 832-836 ◽

Cited By ~ 1

Author(s):

Shuo Ben Hou ◽

Per Erik Hellström ◽

Carl Mikael Zetterling ◽

Mikael Östling

Keyword(s):

High Temperature ◽

Integrated Circuits ◽

Room Temperature ◽

Uv Light ◽

Optical Power ◽

Current Gain ◽

High Current ◽

Promising Candidate ◽

Forward Current ◽

On Chip

This paper presents our in-house fabricated 4H-SiC n-p-n phototransistors. The wafer mapping of the phototransistor on two wafers shows a mean maximum forward current gain (βFmax) of 100 at 25 °C. The phototransistor with the highest βFmax of 113 has been characterized from room temperature to 500 °C. βFmax drops to 51 at 400 °C and remains the same at 500 °C. The photocurrent gain of the phototransistor is 3.9 at 25 °C and increases to 14 at 500 °C under the 365 nm UV light with the optical power of 0.31 mW. The processing of the phototransistor is same to our 4H-SiC-based bipolar integrated circuits, so it is a promising candidate for 4H-SiC opto-electronics on-chip integration.

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