High Temperature High Current Gain IC Compatible 4H-SiC Phototransistor

2019 ◽  
Vol 963 ◽  
pp. 832-836 ◽  
Author(s):  
Shuo Ben Hou ◽  
Per Erik Hellström ◽  
Carl Mikael Zetterling ◽  
Mikael Östling

This paper presents our in-house fabricated 4H-SiC n-p-n phototransistors. The wafer mapping of the phototransistor on two wafers shows a mean maximum forward current gain (βFmax) of 100 at 25 °C. The phototransistor with the highest βFmax of 113 has been characterized from room temperature to 500 °C. βFmax drops to 51 at 400 °C and remains the same at 500 °C. The photocurrent gain of the phototransistor is 3.9 at 25 °C and increases to 14 at 500 °C under the 365 nm UV light with the optical power of 0.31 mW. The processing of the phototransistor is same to our 4H-SiC-based bipolar integrated circuits, so it is a promising candidate for 4H-SiC opto-electronics on-chip integration.

2011 ◽  
Vol 679-680 ◽  
pp. 758-761 ◽  
Author(s):  
Luigia Lanni ◽  
Reza Ghandi ◽  
Martin Domeij ◽  
Carl Mikael Zetterling ◽  
Bengt Gunnar Malm ◽  
...  

In this work, a 4H-SiC lateral PNP transistor fabricated in a high voltage NPN technology has been simulated and characterized. The possibility of fabricating a lateral PNP with a current gain larger than 1 has been investigated. Device and circuit level solutions have been performed.


2012 ◽  
Vol 717-720 ◽  
pp. 1117-1122 ◽  
Author(s):  
Hiroki Miyake ◽  
Tsunenobu Kimoto ◽  
Jun Suda

We demonstrate 4H-SiC bipolar junction transistors (BJTs) with an enhanced current gain over 250. High current gain was achieved by utilizing optimized device geometry as well as optimized surface passivation, continuous epitaxial growth of the emitter-base junction, combined with an intentional deep-level-reduction process based on thermal oxidation to improve the lifetime in p-SiC base. We achieved a maximum current gain (β) of 257 at room temperature and 127 at 250°C for 4H-SiC BJTs fabricated on the (0001)Si-face. The gain of 257 is twice as large as the previous record gain. We also demonstrate BJTs on the (000-1)C-face that showed the highest β of 439 among the SiC BJTs ever reported.


2012 ◽  
Vol 717-720 ◽  
pp. 1261-1264 ◽  
Author(s):  
Amita Patil ◽  
Naresh Rao ◽  
Vinayak Tilak

This paper pertains to development of high temperature capable digital integrated circuits in n-channel, enhancement-mode Silicon Carbide (SiC) MOS technology. Among the circuits developed in this work are data latch, flip flops, 4-bit shift register and ripple counter. All circuits are functional from room temperature up to 300C without any notable degradation in performance at elevated temperature. The 4-bit counter demonstrated stable behavior for over 500 hours of continuous operation at 300C.


2017 ◽  
Vol 897 ◽  
pp. 630-633 ◽  
Author(s):  
Shuo Ben Hou ◽  
Per Erik Hellström ◽  
Carl Mikael Zetterling ◽  
Mikael Östling

An in-house fabricated 4H-SiC PIN diode that has both optical sensing and temperature sensing functions from room temperature (RT) to 550 °C is presented. The two sensing functions can be simply converted from one to the other by switching the bias voltage on the diode. The optical responsivity of the diode at 365 nm is 31.8 mA/W at 550 °C. The temperature sensitivity of the diode is 2.7 mV/°C at the forward current of 1 μA.


2017 ◽  
Vol 38 (10) ◽  
pp. 1429-1432 ◽  
Author(s):  
Hossein Elahipanah ◽  
Saleh Kargarrazi ◽  
Arash Salemi ◽  
Mikael Ostling ◽  
Carl-Mikael Zetterling

2019 ◽  
Vol 9 (20) ◽  
pp. 4239 ◽  
Author(s):  
Hyeongpin Kim ◽  
Heedeuk Shin

An on-chip optical power splitter is a key component of photonic signal processing and quantum integrated circuits and requires compactness, wideband, low insertion loss, and variable splitting ratio. However, designing an on-chip splitter with both customizable splitting ratio and wavelength independence is a big challenge. Here, we propose a tailorable and broadband optical power splitter over 100 nm with low insertion loss less than 0.3%, as well as a compact footprint, based on 1×2 interleaved tapered waveguides. The proposed scheme can design the output power ratio of transverse electric modes, lithographically, and a selection equation of a power splitting ratio is extracted to obtain the desired power ratio. Our splitter scheme is close to an impeccable on-chip optical power splitter for classical and quantum integrated photonic circuits.


1995 ◽  
Vol 67 (7) ◽  
pp. 1010-1012 ◽  
Author(s):  
R. Gerdemann ◽  
T. Bauch ◽  
O. M. Fröhlich ◽  
L. Alff ◽  
A. Beck ◽  
...  

2016 ◽  
Vol 16 (4) ◽  
pp. 3796-3801 ◽  
Author(s):  
Haining Chong ◽  
Huijun Yang ◽  
Weiyou Yang ◽  
Jinju Zheng ◽  
Minghui Shang ◽  
...  

In this study, UV photodetectors (PDs) based on SiC nanowire films have been successfully prepared by a simple and low-cost drip-coating method followed by sintering at 500 °C. The corresponding electrical characterizations clearly demonstrate that the SiC nanowire based PD devices can be regarded as a promising candidate for UV PDs. The PDs can exhibit the excellent performances of fast, high sensitivity, linearity, and stable response, which can thus achieve on-line monitoring of weak UV light. Furthermore, the SiC nanowire-based PDs enable us to fabricate detectors working under high temperature as high as 150 °C. The high photosensitivity and rapid photoresponse for the PDs can be attributed to the superior single crystalline quality of SiC nanowires and the ohmic contact between the electrodes and nanowires.


2008 ◽  
Vol 600-603 ◽  
pp. 1055-1058 ◽  
Author(s):  
Lin Cheng ◽  
Igor Sankin ◽  
Volodymyr Bondarenko ◽  
Michael S. Mazzola ◽  
James D. Scofield ◽  
...  

In this work we have demonstrated the high-temperature operations of 600 V/50 A 4HSiC vertical-channel junction field-effect transistors (VJFETs) with an active area of 3 mm2. Specific-on resistance (RONSP) in the linear region of a single die is less than 2.6 mW.cm2 while the drain-source current is over 50 A under a gate bias (VGS) of 3 V. A reverse blocking gain of 54 is obtained at gate bias ranging from -13 V to -23 V and drain-source leakage current (IRDS) of 200 μA. To demonstrate the use of SiC VJFETs for high-power applications, eight 3 mm2 SiC VJFETs are bonded in a high current 600-V module. RONSP in the linear region of these eight-paralleled SiC VJFETs is 2.8 mW.cm2 at room temperature and increased to 5.35 mW.cm2 at an ambient temperature of 175 °C in air, corresponding to a shift of 0.61%/°C from room temperature to 175 °C. Meanwhile, the forward current is over 360 A at room temperature and reduces to 188 A at 175 °C at drain-source bias (VDS) of 5.25 V and VGS of 3 V.


2014 ◽  
Vol 2014 (HITEC) ◽  
pp. 000072-000075 ◽  
Author(s):  
Cheng-Po Chen ◽  
Reza Ghandi ◽  
Liang Yin ◽  
Xingguang Zhu ◽  
Liangchun Yu ◽  
...  

In this work silicon carbide MOSFET based integrated circuits such as operational amplifier. 27-stage ring oscillator and CMOS-based inverter have been designed, fabricated and successfully tested at high temperatures. Silicon carbide MOSFETs remained fully operational from room temperature to 500°C with stable I-V characteristics. Also 27-stage ring oscillator, operational amplifier and CMOS inverter tested and shown to be functional up to 500°C, with relatively small performance change between 300°C and 500°C. High temperature reliability evaluation of these circuits demonstrate stable operation and both the ring oscillator and OpAmp survived more than 100 hours at 500°C.


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