scholarly journals High-Performance On-Chip Silicon Beamsplitter Based on Subwavelength Metamaterials for Enhanced Fabrication Tolerance

Nanomaterials ◽  
2021 ◽  
Vol 11 (5) ◽  
pp. 1304
Author(s):  
Raquel Fernández de Cabo ◽  
David González-Andrade ◽  
Pavel Cheben ◽  
Aitor V. Velasco
Keyword(s):  
Integrated Circuits ◽  
Fundamental Mode ◽  
High Performance ◽  
Three Dimensional ◽  
High Sensitivity ◽  
Power Splitting ◽  
Excess Loss ◽  
Power Splitters ◽  
On Chip ◽  
Efficient Power

Efficient power splitting is a fundamental functionality in silicon photonic integrated circuits, but state-of-the-art power-division architectures are hampered by limited operational bandwidth, high sensitivity to fabrication errors or large footprints. In particular, traditional Y-junction power splitters suffer from fundamental mode losses due to limited fabrication resolution near the junction tip. In order to circumvent this limitation, we propose a new type of high-performance Y-junction power splitter that incorporates subwavelength metamaterials. Full three-dimensional simulations show a fundamental mode excess loss below 0.1 dB in an ultra-broad bandwidth of 300 nm (1400–1700 nm) when optimized for a fabrication resolution of 50 nm, and under 0.3 dB in a 350 nm extended bandwidth (1350–1700 nm) for a 100 nm resolution. Moreover, analysis of fabrication tolerances shows robust operation for the fundamental mode to etching errors up to ± 20 nm. A proof-of-concept device provides an initial validation of its operation principle, showing experimental excess losses lower than 0.2 dB in a 195 nm bandwidth for the best-case resolution scenario (i.e., 50 nm).

3-D Integration Technology for High Performance Detector Arrays

2006 ◽  
Vol 970 ◽  
Author(s):  
Dorota Temple ◽  
Christopher A. Bower ◽  
Dean Malta ◽  
James E. Robinson ◽  
Phillip R. Coffman ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Focal Plane ◽  
High Performance ◽  
Three Dimensional ◽  
Focal Plane Arrays ◽  
Detector Arrays ◽  
Silicon Integrated Circuits ◽  
Military Systems ◽  
On Chip ◽  
Chip Signal

ABSTRACTThis paper describes a technology for three-dimensional (3-D) integration of multiple layers of silicon integrated circuits. The technology promises to dramatically enhance on-chip signal processing capabilities of a variety of detector devices hybridized with Si electronics. The focus of the paper is on high performance infrared focal plane arrays based on HgCdTe, which offer the ultimate in infrared sensitivity and find application in high performance military systems. Performance data from test FPA devices with integrated multilayer Si stacks are discussed in this paper.

scholarly journals A Brief Overview of On-Chip Voltage Regulation in High-Performance and High-Density Integrated Circuits

IEEE Access ◽  
2021 ◽  
Vol 9 ◽  
pp. 813-826
Author(s):  
Farid Uddin Ahmed ◽  
Zarin Tasnim Sandhie ◽  
Liaquat Ali ◽  
Masud H. Chowdhury
Keyword(s):  
Integrated Circuits ◽  
High Performance ◽  
Voltage Regulation ◽  
High Density ◽  
On Chip

scholarly journals Pulsed Electromagnetic Cross-Well Exploration for Monitoring Permafrost and Examining the Processes of Its Geocryological Changes

Geosciences ◽  
2021 ◽  
Vol 11 (2) ◽  
pp. 60
Author(s):  
Viacheslav Glinskikh ◽  
Oleg Nechaev ◽  
Igor Mikhaylov ◽  
Kirill Danilovskiy ◽  
Vladimir Olenchenko
Keyword(s):  
High Performance ◽  
Geophysical Methods ◽  
Three Dimensional ◽  
High Sensitivity ◽  
Data Interpretation ◽  
Industrial Facilities ◽  
Wide Range ◽  
Vector Finite Element ◽  
A New Technique ◽  
Pulsed Electromagnetic

This paper is dedicated to the topical problem of examining permafrost’s state and the processes of its geocryological changes by means of geophysical methods. To monitor the cryolithozone, we proposed and scientifically substantiated a new technique of pulsed electromagnetic cross-well sounding. Based on the vector finite-element method, we created a mathematical model of the cross-well sounding process with a pulsed source in a three-dimensional spatially heterogeneous medium. A high-performance parallel computing algorithm was developed and verified. Through realistic geoelectric models of permafrost with a talik under a highway, constructed following the results of electrotomography field data interpretation, we numerically simulated the pulsed sounding on the computing resources of the Siberian Supercomputer Center of SB RAS. The simulation results suggest the proposed system of pulsed electromagnetic cross-well monitoring to be characterized by a high sensitivity to the presence and dimensions of the talik. The devised approach can be oriented to addressing a wide range of issues related to monitoring permafrost rocks under civil and industrial facilities, buildings, and constructions.

scholarly journals A Self-Powered Nanogenerator for the Electrical Protection of Integrated Circuits from Trace Amounts of Liquid

2019 ◽  
Vol 12 (1) ◽  
Author(s):  
Zhuang Hui ◽  
Ming Xiao ◽  
Daozhi Shen ◽  
Jiayun Feng ◽  
Peng Peng ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
High Performance ◽  
Printed Circuit Board ◽  
Short Circuit ◽  
High Sensitivity ◽  
Short Circuit Current ◽  
Fast Response ◽  
Open Circuit ◽  
Circuit Board ◽  
Self Powered

Abstract With the increase in the use of electronic devices in many different environments, a need has arisen for an easily implemented method for the rapid, sensitive detection of liquids in the vicinity of electronic components. In this work, a high-performance power generator that combines carbon nanoparticles and TiO2 nanowires has been fabricated by sequential electrophoretic deposition (EPD). The open-circuit voltage and short-circuit current of a single generator are found to exceed 0.7 V and 100 μA when 6 μL of water was applied. The generator is also found to have a stable and reproducible response to other liquids. An output voltage of 0.3 V was obtained after 244, 876, 931, and 184 μs, on exposure of the generator to 6 μL of water, ethanol, acetone, and methanol, respectively. The fast response time and high sensitivity to liquids show that the device has great potential for the detection of small quantities of liquid. In addition, the simple easily implemented sequential EPD method ensures the high mechanical strength of the device. This compact, reliable device provides a new method for the sensitive, rapid detection of extraneous liquids before they can impact the performance of electronic circuits, particularly those on printed circuit board.

Nanopillar modified high-sensitivity asymmetric Graphene-GaN photodetector

Nanoscale ◽  
2021 ◽  
Author(s):  
Chang Liu ◽  
Xiaodong Li ◽  
Tiangui Hu ◽  
Wenkai Zhu ◽  
Faguang Yan ◽  
...  
Keyword(s):  
Electrical Properties ◽  
High Performance ◽  
2D Materials ◽  
Three Dimensional ◽  
High Sensitivity ◽  
Optical And Electrical Properties ◽  
Two Dimensional

Integration of two dimensional (2D) materials with three dimensional (3D) semiconductors reveals intriguing optical and electrical properties that surpass those of the original materials. Here we report the high performance...

A Novel Scheme for Wide Bandwidth Chip-to-Chip Communications

2007 ◽  
Vol 4 (1) ◽  
pp. 1-7 ◽  
Author(s):  
Qing Liu ◽  
Patrick Fay ◽  
Gary H. Bernstein
Keyword(s):  
Integrated Circuits ◽  
Coplanar Waveguide ◽  
Impedance Matching ◽  
Three Dimensional ◽  
Fabrication Process ◽  
Silicon Substrates ◽  
Electromagnetic Simulations ◽  
Communication Paradigm ◽  
On Chip ◽  
Test Chips

Quilt Packaging (QP), a novel chip-to-chip communication paradigm for system-in-package integration, is presented. By forming protruding metal nodules along the edges of the chips and interconnecting integrated circuits (ICs) through them, QP offers an approach to ameliorate the I/O speed bottleneck. A fabrication process that includes deep reactive ion etching, electroplating, and chemical-mechanical polishing is demonstrated. As a low-temperature process, it can be easily integrated into a standard IC fabrication process. Three-dimensional electromagnetic simulations of coplanar waveguide QP structures have been performed, and geometries intended to improve impedance matching at the interface between the on-chip interconnects and the chip-to-chip nodule structures were evaluated. Test chips with 100 μm wide nodules were fabricated on silicon substrates, and s-parameters of chip-to-chip interconnects were measured. The insertion loss of the chip-to-chip interconnects was as low as 0.2 dB at 40 GHz. Simulations of 20 μm wide QP structures suggest that the bandwidth of the inter-chip nodules is expected to be above 200 GHz.

Aerosol Jet® Printer as an Alternative to Wire Bond and TSV Technology for 3D Interconnect Applications

2011 ◽  
Vol 2011 (1) ◽  
pp. 001028-001032
Author(s):  
Michael J. O’Reilly ◽  
Jeff Leal ◽  
Suzette K. Pangrle ◽  
Kenneth Vartanian
Keyword(s):  
Integrated Circuits ◽  
High Performance ◽  
Three Dimensional ◽  
Contact Printing ◽  
Wire Bond ◽  
Printing System ◽  
3D Printed ◽  
Working Distance ◽  
Aerosol Jet Deposition ◽  
Vertical Interconnect

Aerosol Jet deposition systems provide an evolutionary alternative to both wire bond and TSV technology. As part of the Vertical Interconnect Pillar (ViP™) process, the Aerosol Jet system prints high density three-dimensional (3D) interconnects enabling multi-function integrated circuits to be stacked and vertically interconnected in high performance System-in-Packages (SiP). The stacks can include two or more die, with a total height of ∼ 2 millimeters. The non-contact printing system has a working distance of several millimeters above the substrate allowing 3D interconnects to be printed with no Z-height adjustments. The Aerosol Jet printhead is configured with multiple nozzles and a closely coupled atomizer to achieve production throughput of greater than 19,000 interconnects per hour. The Aerosol Jet printer deposits silver fine particle ink to form connections on staggered die stacks. High aspect ratio interconnects, less than 30-microns wide and greater than 6-microns tall, are printed at sub 60-micron pitch. After isothermal sintering at 150° C to 200° C for 30 minutes, highly conductive interconnects near bulk resistivity are produced. Pre-production yields exceeding 80% have been realized. This paper will provide further details on the 3D printed interconnect process, current and planned production throughput levels, and process yield and device reliability status.

scholarly journals A Broadband THz On-Chip Transition Using a Dipole Antenna with Integrated Balun

Electronics ◽  
2018 ◽  
Vol 7 (10) ◽  
pp. 236 ◽  
Author(s):  
Wonseok Choe ◽  
Jinho Jeong
Keyword(s):  
Integrated Circuits ◽  
Insertion Loss ◽  
Low Cost ◽  
Three Dimensional ◽  
Equivalent Circuit Model ◽  
Dipole Antenna ◽  
Impedance Match ◽  
Inp Substrate ◽  
On Chip ◽  
High Dielectric

A waveguide-to-microstrip transition is an essential component for packaging integrated circuits (ICs) in rectangular waveguides, especially at millimeter-wave and terahertz (THz) frequencies. At THz frequencies, the on-chip transitions, which are monolithically integrated in ICs are preferred to off-chip transitions, as the former can eliminate the wire-bonding process, which can cause severe impedance mismatch and additional insertion loss of the transitions. Therefore, on-chip transitions can allow the production of low cost and repeatable THz modules. However, on-chip transitions show limited performance in insertion loss and bandwidth, more seriously, this is an in-band resonance issue. These problems are mainly caused by the substrate used in the THz ICs, such as an indium phosphide (InP), which exhibits a high dielectric constant, high dielectric loss, and high thickness, compared with the size of THz waveguides. In this work, we propose a broadband THz on-chip transition using a dipole antenna with an integrated balun in the InP substrate. The transition is designed using three-dimensional electromagnetic (EM) simulations based on the equivalent circuit model. We show that in-band resonances can be induced within the InP substrate and also prove that backside vias can effectively eliminate these resonances. Measurement of the fabricated on-chip transition in 250 nm InP heterojunction bipolar transistor (HBT) technology, shows wideband impedance match and low insertion loss at H-band frequencies (220–320 GHz), without in-band resonances, due to the properly placed backside vias.

scholarly journals Low-Loss and Broadband Silicon Photonic 3-dB Power Splitter with Enhanced Coupling of Shallow-Etched Rib Waveguides

2020 ◽  
Vol 10 (13) ◽  
pp. 4507
Author(s):  
Vinh Huu Nguyen ◽  
In Ki Kim ◽  
Tae Joon Seok
Keyword(s):  
Integrated Circuits ◽  
Large Scale ◽  
Low Loss ◽  
Critical Dimensions ◽  
Power Splitter ◽  
Excess Loss ◽  
Silicon Photonic ◽  
Essential Components ◽  
Rib Waveguides ◽  
Power Splitters

A silicon photonic 3-dB power splitter is one of the essential components to demonstrate large-scale silicon photonic integrated circuits (PICs), and can be utilized to implement modulators, 1 × 2 switches, and 1 × N power splitters for various PIC applications. In this paper, we reported the design and experimental demonstration of low-loss and broadband silicon photonic 3-dB power splitters. The power splitter was realized by adiabatically tapered rib waveguides with 60-nm shallow etches. The shallow-etched rib waveguides offered strong coupling and relaxed critical dimensions (a taper tip width of 200 nm and gap spacing of 300 nm). The fabricated device exhibited an excess loss as low as 0.06 dB at a 1550-nm wavelength and a broad operating wavelength range from 1470 nm to 1570 nm. The relaxed critical dimensions (≥200 nm) make the power splitter compatible with standard fabrication processes of existing silicon photonics foundries.

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