A low-noise low-power IF amplifier with input and output impedance matching

Author(s):  
D. Coffing ◽  
E. Main
Author(s):  
Teguh Firmansyah ◽  
Anggoro Suryo Pramudyo ◽  
Siswo Wardoyo ◽  
Romi Wiryadinata ◽  
Alimuddin Alimuddin

<span>A quad-band low noise amplifier (QB-LNA) based on multisection impedance transformer designed and evaluated in this research. As a novelty, a multisection impedance transformer was used to produce QB-LNA. A multisection impedance transformer is used as input and output impedance matching because it has higher stability, large Q factor, and low noise than lumpedcomponent.The QB-LNA was designed on FR4 microstrip substrate with </span><span>e</span><span>r= 4.4, thickness h=0.8 mm, and tan </span><span>d</span><span>= 0.026. The proposed QB-LNA was designed and analyzed by Advanced Design System (ADS).The simulation has shown that QB-LNA achieves gain (S<sub>21</sub>) of 22.91 dB, 16.5 dB,  11.18 dB, and 7.25 dB at 0.92 GHz, 1.84 GHz, 2.61 GHz, and 3.54 GHz, respectively.The QB-LNA obtainreturn loss (S<sub>11</sub>) of -21.28 dB, -31.87 dB,  -28.08 dB, and -30.85 dB at 0.92 GHz, 1.84 GHz, 2.61 GHz, and 3.54 GHz, respectively. It also achieves a noise figure (nf) of 2.35 dB, 2.13 dB, 2.56 dB, and 3.55 dB at 0.92 GHz, 1.84 GHz, 2.61 GHz, and 3.54 GHz, respectively. This research also has shown that the figure of merit (FoM) of the proposed QB-LNA is higher than that of another multiband LNA.</span>


2013 ◽  
Vol 2013 ◽  
pp. 1-6 ◽  
Author(s):  
K. Yousef ◽  
H. Jia ◽  
R. Pokharel ◽  
A. Allam ◽  
M. Ragab ◽  
...  

This paper presents the design of ultra-wideband low noise amplifier (UWB LNA). The proposed UWB LNA whose bandwidth extends from 2.5 GHz to 16 GHz is designed using a symmetric 3D RF integrated inductor. This UWB LNA has a gain of 11 ± 1.0 dB and a NF less than 3.3 dB. Good input and output impedance matching and good isolation are achieved over the operating frequency band. The proposed UWB LNA is driven from a 1.8 V supply. The UWB LNA is designed and simulated in standard TSMC 0.18 µm CMOS technology process.


2021 ◽  
Author(s):  
Mohammad Rezvani

Recently, the growing advances in communication systems has led to urgent demand for low power, low cost, and highly integrated circuit topologies for transceiver designs, as key components of nearly every wireless application. Regarding to the usually weak input signal of such systems, the primary purpose of the wireless transceivers is consequently amplifying the signal without adding additional noise as much as possible. As a result, the performance of the low noise amplifier (LNA), measured in terms of features like gain, noise figure, dynamic range, return loss and stability, can highly determine the system’s achievement. Along with the evolution in wireless technologies, people get closer to the global seamless communication, which means people can unlimitedly communicates with each other under any circumstances. This achievement, as a result, paves the way for realizing wireless body area network (WBAN), the required applications for wireless sensor network, healthcare technology, and continuous health monitoring. This thesis suggests a number of LNA designs that can meet a wide range of requirements viz gain, noise figure, impedance matching, and power dissipation at 2.4Ghz frequency based on 0.13μm and 65nm CMOS technologies. This dissertation focused on the low power, high gain, CMOS reused current (CICR) LNA with noise optimization for on-body wireless body area networks (WBAN). A new design methodology is introduced for optimization of the LNA to attain gain and noise match concurrently. The designed LNA achieves a 28.5 dB gain, 2.4 dB noise figure, -18 dB impedance matching, while dissipating 1mW from a 1.2V power supply at 2.4 GHz frequency which is intended for WBAN applications. The tests and simulations of LNA are utilized in Cadence IC6.15 with IBM 130nm CMRF-8-SF library. The provided CICR LNA results inclusively prove the advantages of our design over other recorded structures. In the second step, a new linearization method is proposed based on Cascade LNA structure (CC-LNA). The proposed negative feedback intermodulation sink (NF-IMS) method benefits from the feedback to improve the linearity of CC-LNA. It proves that the additional negative feedback enhances the linearity of LNA despite the previous research. Furthermore, the heavily mathematical calculations of NF-IMS technique are carried on with the proposed modified Volterra series method. The NF-IMS method demonstrates more than 9.5dBm improvement in IIP3. Comparing to the previous techniques like: MDS and IMS, the improvement in the linearity aspect of the CC-LNA with is significant while it achieves a sufficient gain and noise performance of 16.7dB and 1.26db, respectively. Besides, the NF-IMS method presents a noise cancellation behavior as well. To increase the practical reliability of simulation, the real element model from TSMC 65nm CRN65GP library is applied. The CC-LNA that employed NF-IMS method is an excellent match with the market demands in WBAN’s gateway applications.


2021 ◽  
Author(s):  
Mohammad Rezvani

Recently, the growing advances in communication systems has led to urgent demand for low power, low cost, and highly integrated circuit topologies for transceiver designs, as key components of nearly every wireless application. Regarding to the usually weak input signal of such systems, the primary purpose of the wireless transceivers is consequently amplifying the signal without adding additional noise as much as possible. As a result, the performance of the low noise amplifier (LNA), measured in terms of features like gain, noise figure, dynamic range, return loss and stability, can highly determine the system’s achievement. Along with the evolution in wireless technologies, people get closer to the global seamless communication, which means people can unlimitedly communicates with each other under any circumstances. This achievement, as a result, paves the way for realizing wireless body area network (WBAN), the required applications for wireless sensor network, healthcare technology, and continuous health monitoring. This thesis suggests a number of LNA designs that can meet a wide range of requirements viz gain, noise figure, impedance matching, and power dissipation at 2.4Ghz frequency based on 0.13μm and 65nm CMOS technologies. This dissertation focused on the low power, high gain, CMOS reused current (CICR) LNA with noise optimization for on-body wireless body area networks (WBAN). A new design methodology is introduced for optimization of the LNA to attain gain and noise match concurrently. The designed LNA achieves a 28.5 dB gain, 2.4 dB noise figure, -18 dB impedance matching, while dissipating 1mW from a 1.2V power supply at 2.4 GHz frequency which is intended for WBAN applications. The tests and simulations of LNA are utilized in Cadence IC6.15 with IBM 130nm CMRF-8-SF library. The provided CICR LNA results inclusively prove the advantages of our design over other recorded structures. In the second step, a new linearization method is proposed based on Cascade LNA structure (CC-LNA). The proposed negative feedback intermodulation sink (NF-IMS) method benefits from the feedback to improve the linearity of CC-LNA. It proves that the additional negative feedback enhances the linearity of LNA despite the previous research. Furthermore, the heavily mathematical calculations of NF-IMS technique are carried on with the proposed modified Volterra series method. The NF-IMS method demonstrates more than 9.5dBm improvement in IIP3. Comparing to the previous techniques like: MDS and IMS, the improvement in the linearity aspect of the CC-LNA with is significant while it achieves a sufficient gain and noise performance of 16.7dB and 1.26db, respectively. Besides, the NF-IMS method presents a noise cancellation behavior as well. To increase the practical reliability of simulation, the real element model from TSMC 65nm CRN65GP library is applied. The CC-LNA that employed NF-IMS method is an excellent match with the market demands in WBAN’s gateway applications.


2015 ◽  
Vol 2015 ◽  
pp. 1-7 ◽  
Author(s):  
Wahab Mohyuddin ◽  
Kang Wook Kim ◽  
Hyun Chul Choi

Two designs of frequency triplers, which use planar transitions as baluns and an antiparallel diode pair to achieve wide bandwidth, are presented. The ultrawideband transitions are utilized for input and output impedance matching of the frequency triplers. The design process and operation principles are described in this paper. The implemented frequency triplers exhibit flat response over wide frequency range of 3 to 9 GHz. The proposed Type A frequency tripler shows conversion loss of ~18 dB with above 30 dB even harmonics suppression. With Type B frequency tripler, conversion loss of ~17 dB and above 25 dB even harmonic suppression are achieved.


2011 ◽  
Vol E94-C (10) ◽  
pp. 1698-1701
Author(s):  
Yang SUN ◽  
Chang-Jin JEONG ◽  
In-Young LEE ◽  
Sang-Gug LEE

2014 ◽  
Vol 23 (08) ◽  
pp. 1450108 ◽  
Author(s):  
VANDANA NIRANJAN ◽  
ASHWANI KUMAR ◽  
SHAIL BALA JAIN

In this work, a new composite transistor cell using dynamic body bias technique is proposed. This cell is based on self cascode topology. The key attractive feature of the proposed cell is that body effect is utilized to realize asymmetric threshold voltage self cascode structure. The proposed cell has nearly four times higher output impedance than its conventional version. Dynamic body bias technique increases the intrinsic gain of the proposed cell by 11.17 dB. Analytical formulation for output impedance and intrinsic gain parameters of the proposed cell has been derived using small signal analysis. The proposed cell can operate at low power supply voltage of 1 V and consumes merely 43.1 nW. PSpice simulation results using 180 nm CMOS technology from Taiwan Semiconductor Manufacturing Company (TSMC) are included to prove the unique results. The proposed cell could constitute an efficient analog Very Large Scale Integration (VLSI) cell library in the design of high gain analog integrated circuits and is particularly interesting for biomedical and instrumentation applications requiring low-voltage low-power operation capability where the processing signal frequency is very low.


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