Capacitance-voltage profiling of GaAs metal-semiconductor field-effect transistors and geometrical interelectrode capacitance

1999 ◽  
Author(s):  
E. Prokhorov ◽  
J. Gonzalez-Hernandez ◽  
N.B. Gorev ◽  
I.F. Kodzhespirova ◽  
Yu.A. Kovalenko
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Capacitance Voltage

scholarly journals Modelling of Dynamic Properties of Silicon Carbide Junction Field-Effect Transistors (JFETs)

Energies ◽  
2020 ◽  
Vol 13 (1) ◽  
pp. 187 ◽  
Author(s):  
Kamil Bargieł ◽  
Damian Bisewski ◽  
Janusz Zarębski
Keyword(s):  
Silicon Carbide ◽  
Integrated Circuit ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Dynamic Properties ◽  
Modified Model ◽  
Spice Model ◽  
Capacitance Voltage ◽  
Effect Transistor ◽  
Switching Characteristics

The paper deals with the problem of modelling and analyzing the dynamic properties of a Junction Field Effect Transistor (JFET) made of silicon carbide. An examination of the usefulness of the built-in JFET Simulation Program with Integrated Circuit Emphasis (SPICE) model was performed. A modified model of silicon carbide JFET was proposed to increase modelling accuracy. An evaluation of the accuracy of the modified model was performed by comparison of the measured and calculated capacitance–voltage characteristics as well as the switching characteristics of JFETs.

Current-voltage and capacitance-voltage characteristics of heterostructure insulated-gate field-effect transistors

1987 ◽  
Vol 34 (8) ◽  
pp. 1650-1657 ◽  
Author(s):  
J. Baek ◽  
M.S. Shur ◽  
R.R. Daniels ◽  
D.K. Arch ◽  
J.K. Abrokwah ◽  
...  
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Current Voltage ◽  
Capacitance Voltage

Shallow Traps at P-Doped SiO2/4H-SiC(0001) Interface

2011 ◽  
Vol 679-680 ◽  
pp. 338-341 ◽  
Author(s):  
Dai Okamoto ◽  
Hiroshi Yano ◽  
Shinya Kotake ◽  
Tomoaki Hatayama ◽  
Takashi Fuyuki
Keyword(s):  
Photoelectron Spectroscopy ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Interface Traps ◽  
Channel Mobility ◽  
X Ray ◽  
Capacitance Voltage ◽  
Shallow Traps

We report on electrical and physical investigations aimed to clarify the mechanisms behind the high channel mobility of 4H-SiC metal–oxide–semiconductor field-effect transistors processed with POCl3 annealing. By low-temperature capacitance–voltage analysis, we found that the shallow interface traps are effectively removed by P incorporation. Using x-ray photoelectron spectroscopy, we found that the three-fold coordinated P atoms exist at the oxide/4H-SiC interface. The overall results suggest that P atoms directly remove the Si–Si bonds and thus eliminate the near-interface traps.

Capacitance–Voltage Characterization of Tunnel Field Effect Transistors with a Si/SiGe Heterojunction

2016 ◽  
Vol 16 (10) ◽  
pp. 10256-10259
Author(s):  
Taehyung Park ◽  
Jang Hyun Kim ◽  
Hyun Woo Kim ◽  
Euyhwan Park ◽  
Junil Lee ◽  
...  
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Capacitance Voltage

Towards Ferroelectric Field Effect Transistors in 4H-Silicon Carbide

2002 ◽  
Vol 742 ◽  
Author(s):  
S.-M. Koo ◽  
S. I. Khartsev ◽  
C.-M. Zetterling ◽  
A. M. Grishin ◽  
M. Östling
Keyword(s):  
Silicon Carbide ◽  
Electrical Properties ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Hysteresis Loops ◽  
Gate Stacks ◽  
Metal Insulator ◽  
Pzt Thin Films ◽  
Capacitance Voltage ◽  
Different Types

ABSTRACTWe report on the integration of ferroelectric Pb(Zr,Ti)O3 (PZT) thin films on 4H-silicon carbide and their electrical properties. The structures of metal-ferroelectric-(insulator)-semiconductor MF(I)S and metal-ferroelectric-metal-insulator-semiconductor MFMIS have been fabricated and characterized. The MFMIS structures of Au/PZT/Pt/Ti/SiO2/SiC have shown fully saturated P-E hysteresis loops with remnant polarization Pr =14.2μC/cm2 and coercive field Ec = 58.9 kV/cm. The MFIS structures exhibited stable capacitance-voltage C-V loops with low conductance (<0.1 mS/cm2, tan d ∼ 0.0007 at 12 V, 400kHz) and memory window as wide as 10 V, when a 5 nm-thick Al2O3 was used as a high bandgap (Eg ∼ 9eV) barrier buffer layer between PZT (Eg ∼ 3.5eV) and SiC (Eg ∼ 3.2eV). Both structures on n- and p- SiC have shown electrical properties promising for the application to the gate stacks for the SiC field-effect transistors (FETs) and the design and process issues on different types of the metal-ferroelectric-silicon carbide field-effect transistors (FETs) have also been proposed.

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