Analytical Study of Unipolar Junction Transistor as a Novel Dual Material Double Gate MOSFET to Suppress Short-Channel Effect

Author(s):  
Arighna Basak ◽  
Angsuman Sarkar

2007 ◽  
Vol 46 (4B) ◽  
pp. 2096-2100 ◽  
Author(s):  
Hideki Oka ◽  
Ryo Tanabe ◽  
Norio Sadachika ◽  
Akihiro Yumisaki ◽  
Mitiko Miura-Mattausch


2020 ◽  
Vol 8 ◽  
pp. 939-947
Author(s):  
Amin Rassekh ◽  
Jean-Michel Sallese ◽  
Farzan Jazaeri ◽  
Morteza Fathipour ◽  
Adrian M. Ionescu


2008 ◽  
Vol 55 (3) ◽  
pp. 796-802 ◽  
Author(s):  
Siddharth Chouksey ◽  
Jerry G. Fossum


Author(s):  
Yuk L. Tsang ◽  
Xiang D. Wang ◽  
Reyhan Ricklefs ◽  
Jason Goertz

Abstract In this paper, we report a transistor model that has successfully led to the identification of a non visual defect. This model was based on detailed electrical characterization of a MOS NFET exhibiting a threshold voltage (Vt) of just about 40mv lower than normal. This small Vt delta was based on standard graphical extrapolation method in the usual linear Id-Vg plots. We observed, using a semilog plot, two slopes in the Id-Vg curves with Vt delta magnified significantly in the subthreshold region. The two slopes were attributed to two transistors in parallel with different Vts. We further found that one of the parallel transistors had short channel effect due to a punch-through mechanism. It was proposed and ultimately confirmed the cause was due to a dopant defect using scanning capacitance microscopy (SCM) technique.



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