Electrical analysis of mechanical stress induced by shallow trench isolation [MOSFETs]

Author(s):  
C. Gallon ◽  
G. Reimbold ◽  
G. Ghibaudo ◽  
R.A. Blanchi ◽  
R. Gwoziecki ◽  
...  
1998 ◽  
Author(s):  
I. De Wolf ◽  
G. Groeseneken ◽  
H.E. Maes ◽  
M. Bolt ◽  
K. Barla ◽  
...  

Abstract It is shown, using micro-Raman spectroscopy, that Shallow Trench Isolation introduces high stresses in the active area of silicon devices when wet oxidation steps are used. These stresses result in defect formation in the active area, leading to high diode leakage currents. The stress levels are highest near the outer edges of line structures and at square structures. They also increase with decreasing active area dimensions.


2012 ◽  
Vol 52 (9-10) ◽  
pp. 1949-1952 ◽  
Author(s):  
Seonhaeng Lee ◽  
Dongwoo Kim ◽  
Cheolgyu Kim ◽  
Chiho Lee ◽  
Jeongsoo Park ◽  
...  

2011 ◽  
Vol 88 (6) ◽  
pp. 882-887 ◽  
Author(s):  
Dongwoo Kim ◽  
Seonhaeng Lee ◽  
T.K. Oh ◽  
S.Y. Cha ◽  
S.J. Hong ◽  
...  

Author(s):  
Christopher L. Henderson ◽  
Charles E. Hembree ◽  
Jerry M. Soden ◽  
Thomas J. Headley ◽  
Bruce L. Draper

Abstract During the development and qualification of a radiation-hardened, 0.5 μm shallow trench isolation technology, several yield-limiting defects were observed. The 256K (32K x 8) static-random access memories (SRAMs) used as a technology characterization vehicle had elevated power supply current during wafer probe testing. Many of the die sites were functional, but exhibited quiescent power supply current (IDDQ) in excess of 100 μA, the present limit for this particular SRAM. Initial electrical analysis indicated that many of the die sites exhibited unstable IDDQ that fluctuated rapidly. We refer to this condition as “jitter.” The IDDQ jitter appeared to be independent of temperature and predominately associated with the larger 256K SRAMs and not as prevalent in the 16K SRAMs (on the same reticle set). The root cause of failure was found to be two major processing problems: salicide bridging and stress-induced dislocations in the silicon island


1999 ◽  
Vol 568 ◽  
Author(s):  
Hernan Rueda ◽  
James Slinkman ◽  
Dureseti Chidambarrao ◽  
Leon Moszkowicz ◽  
Phil Kaszuba ◽  
...  

ABSTRACTmethod for characterizing the mechanical stress induced in silicon technology is described. Analysis by scanning Kelvin probe force microscopy (SKPM) coupled with finite-element (FE) mechanical strain simulations is performed. The SKPM technique detects variations in the semiconductor work function due to strain influences on the band gap. This technique is then used to analyze the strain induced by shallow trench isolation processes for electrical isolation. The SKPM measurements agree with the FE simulations qualitatively.


Sign in / Sign up

Export Citation Format

Share Document