A self biased operational amplifier at ultra low power supply voltage

2009 ◽  
Author(s):  
Sai Praneeth G A V ◽  
Anil Kumar Saini
Keyword(s):  
Low Power ◽  
Power Supply ◽  
Operational Amplifier ◽  
Supply Voltage ◽  
Power Supply Voltage ◽  
Ultra Low Power

An Ultra-Low-Power Memory With a Subthreshold Power Supply Voltage

2006 ◽  
Vol 41 (10) ◽  
pp. 2344-2353 ◽  
Author(s):  
J. Chen ◽  
L.T. Clark ◽  
T.-H. Chen
Keyword(s):  
Low Power ◽  
Power Supply ◽  
Supply Voltage ◽  
Power Supply Voltage ◽  
Ultra Low Power

AlInAs/GaInAs on InP HEMTs for low power supply voltage operation of high power-added efficiency microwave amplifiers

1993 ◽  
Vol 29 (15) ◽  
pp. 1324 ◽  
Author(s):  
L.E. Larson ◽  
M.M. Matloubian ◽  
J.J. Brown ◽  
A.S. Brown ◽  
M. Thompson ◽  
...  
Keyword(s):  
Low Power ◽  
High Power ◽  
Power Supply ◽  
Supply Voltage ◽  
Power Supply Voltage ◽  
Power Added Efficiency ◽  
Microwave Amplifiers

High‐speed low‐power and low‐power supply voltage dynamic comparator

2015 ◽  
Vol 51 (23) ◽  
pp. 1914-1916 ◽  
Author(s):  
Daiguo Xu ◽  
Shiliu Xu ◽  
Guangbing Chen
Keyword(s):  
Low Power ◽  
Power Supply ◽  
High Speed ◽  
Supply Voltage ◽  
Power Supply Voltage ◽  
Dynamic Comparator

Low Power FGSRAM Cell Using Sleepy and LECTOR Technique

2016 ◽  
Vol 4 (2) ◽  
pp. 333 ◽  
Author(s):  
Kanan Bala Ray ◽  
Sushanta Kumar Mandal ◽  
Shivalal Patro
Keyword(s):  
Low Power ◽  
Power Supply ◽  
High Stability ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Floating Gate ◽  
Power Supply Voltage ◽  
Operation Analysis ◽  
Sram Cell ◽  
Simulation Results

<em>In this paper floating gate MOS (FGMOS) along with sleep transistor technique and leakage control transistor (LECTOR) technique has been used to design low power SRAM cell. Detailed investigation on operation, analysis and result comparison of conventional 6T, FGSRAM, FGSLEEPY, FGLECTOR and FGSLEEPY LECTOR has been done. All the simulations are done in Cadence Virtuoso environment on 45 nm standard CMOS technology with 1 V power supply voltage. Simulation results show that FGSLEEPY LECTOR SRAM cell consumes very low power and achieves high stability compared to conventional FGSRAM Cell</em>

scholarly journals A 0.6 V MOS-Only Voltage Reference for Biomedical Applications with 40 ppm/∘C Temperature Drift

2018 ◽  
Vol 27 (08) ◽  
pp. 1850128 ◽  
Author(s):  
R. Nagulapalli ◽  
K. Hayatleh ◽  
Steve Barker ◽  
Sumathi Raparthy ◽  
Nabil Yassine ◽  
...  
Keyword(s):  
Power Supply ◽  
Biomedical Applications ◽  
Low Voltage ◽  
Supply Voltage ◽  
Absolute Temperature ◽  
Voltage Reference ◽  
Mos Transistors ◽  
Power Supply Voltage ◽  
Temperature Drift ◽  
Ultra Low Power

This paper exploits the CMOS beta multiplier circuit to synthesize a temperature-independent voltage reference suitable for low voltage and ultra-low power biomedical applications. The technique presented here uses only MOS transistors to generate Proportional To Absolute Temperature (PTAT) and Complimentary To Absolute Temperature (CTAT) currents. A self-biasing technique has been used to minimize the temperature and power supply dependency. A prototype in 65[Formula: see text]nm CMOS has been developed and occupies 0.0039[Formula: see text]mm2, and at room temperature, it generates a 204[Formula: see text]mV reference voltage with 1.3[Formula: see text]mV drift over a wide temperature range (from [Formula: see text]40[Formula: see text]C to 125[Formula: see text]C). This has been designed to operate with a power supply voltage down to 0.6[Formula: see text]V and consumes 1.8[Formula: see text]uA current from the supply. The simulated temperature coefficient is 40[Formula: see text]ppm/[Formula: see text]C.

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