Low Power FGSRAM Cell Using Sleepy and LECTOR Technique

2016 ◽  
Vol 4 (2) ◽  
pp. 333 ◽  
Author(s):  
Kanan Bala Ray ◽  
Sushanta Kumar Mandal ◽  
Shivalal Patro
Keyword(s):  
Low Power ◽  
Power Supply ◽  
High Stability ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Floating Gate ◽  
Power Supply Voltage ◽  
Operation Analysis ◽  
Sram Cell ◽  
Simulation Results

<em>In this paper floating gate MOS (FGMOS) along with sleep transistor technique and leakage control transistor (LECTOR) technique has been used to design low power SRAM cell. Detailed investigation on operation, analysis and result comparison of conventional 6T, FGSRAM, FGSLEEPY, FGLECTOR and FGSLEEPY LECTOR has been done. All the simulations are done in Cadence Virtuoso environment on 45 nm standard CMOS technology with 1 V power supply voltage. Simulation results show that FGSLEEPY LECTOR SRAM cell consumes very low power and achieves high stability compared to conventional FGSRAM Cell</em>

AlInAs/GaInAs on InP HEMTs for low power supply voltage operation of high power-added efficiency microwave amplifiers

1993 ◽  
Vol 29 (15) ◽  
pp. 1324 ◽  
Author(s):  
L.E. Larson ◽  
M.M. Matloubian ◽  
J.J. Brown ◽  
A.S. Brown ◽  
M. Thompson ◽  
...  
Keyword(s):  
Low Power ◽  
High Power ◽  
Power Supply ◽  
Supply Voltage ◽  
Power Supply Voltage ◽  
Power Added Efficiency ◽  
Microwave Amplifiers

High‐speed low‐power and low‐power supply voltage dynamic comparator

2015 ◽  
Vol 51 (23) ◽  
pp. 1914-1916 ◽  
Author(s):  
Daiguo Xu ◽  
Shiliu Xu ◽  
Guangbing Chen
Keyword(s):  
Low Power ◽  
Power Supply ◽  
High Speed ◽  
Supply Voltage ◽  
Power Supply Voltage ◽  
Dynamic Comparator

AN EFFICIENT LOW-POWER SIGMA-DELTA MODULATOR FOR MULTI-STANDARD WIRELESS APPLICATIONS

2012 ◽  
Vol 21 (04) ◽  
pp. 1250028 ◽  
Author(s):  
B. HODA SEYEDHOSSEINZADEH ◽  
MOHAMMAD YAVARI
Keyword(s):  
Low Power ◽  
Power Supply ◽  
Cmos Technology ◽  
System Level ◽  
Sigma Delta Modulator ◽  
Sigma Delta ◽  
Wireless Applications ◽  
Design And Implementation ◽  
Simulation Results ◽  
System Level Simulations

This paper describes the design and implementation of a reconfigurable low-power sigma-delta modulator (SDM) for multi-standard wireless communications in a 90 nm CMOS technology. Both architectural and circuital reconfigurations are used to adapt the performance of the modulator to multi-standard applications. The feasibility of the presented solution is demonstrated using system-level simulations as well as transistor-level simulations of the modulator. HSPICE simulation results show that the proposed modulator achieves 76.8/78.9/80.8/85/89.5 dB peak signal-to-noise plus distortion ratio (SNDR) within the standards WiFi, WiMAX, WCDMA, Bluetooth and GSM with the bandwidth of 12.5 MHz, 10 MHz, 1.92 MHz, 0.5 MHz, and 250 kHz, respectively, under the power consumption of 37/37/12/5/5 mW using a single 1 V power supply.

A CLOCK GATED SUCCESSIVE APPROXIMATION REGISTER FOR A/D CONVERSIONS

2014 ◽  
Vol 23 (02) ◽  
pp. 1450023
Author(s):  
MOHAMED O. SHAKER ◽  
MAGDY A. BAYOUMI
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Successive Approximation ◽  
Power Supply ◽  
Cmos Technology ◽  
Clock Signal ◽  
Switching Activity ◽  
Successive Approximation Register ◽  
Simulation Results ◽  
Data Switching

A novel low power clock gated successive approximation register (SAR) is proposed. The new register is based on gating the clock signal when there is no data switching activity. It operates with fewer transistors and no redundant transitions which makes it suitable for low power applications. The proposed register consisting of 8 bits has been designed up to the layout level with 1 V power supply in 90 nm CMOS technology and has been simulated using SPECTRE. Simulation results have shown that the proposed register saves up to 75% of power consumption.

A High-Order Curvature-Compensated Bandgap Voltage Reference for Micro-Gyroscope

2012 ◽  
Vol 503 ◽  
pp. 12-17
Author(s):  
Qiang Li ◽  
Xiao Yun Tan ◽  
Guan Shi Wang
Keyword(s):  
Power Supply ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Bandgap Reference ◽  
Voltage Reference ◽  
Temperature Dependent ◽  
Power Supply Voltage ◽  
Gyroscope System ◽  
Bandgap Voltage Reference ◽  
Reference Circuit

The reference is an important part of the micro-gyroscope system. The precision and stability of the reference directly affect the precision of the micro-gyroscope. Unlike the traditional bandgap reference circuit, a circuit using a temperature-dependent resistor ratio generated by a highly-resistive poly resistor and a diffusion resistor in CMOS technology is proposed in this paper. The complexity of the circuit is greatly reduced. Implemented with the standard 0.5μm CMOS technology and 9V power supply voltage, in the range of -40~120°C, the temperature coefficient of the proposed bandgap voltage reference can achieve to about 1.6 ppm/°C. The PSRR of the circuit is -107dB.

Single Inductor Bipolar Outputs DC-DC Converter with Current Mode Control Circuit

2013 ◽  
Vol 534 ◽  
pp. 220-226 ◽  
Author(s):  
Nobukazu Takai ◽  
Takashi Okada ◽  
Kenji Takahashi ◽  
Hajime Yokoo ◽  
Shunsuke Miwa ◽  
...  
Keyword(s):  
Power Supply ◽  
Supply Voltage ◽  
Current Mode ◽  
Cmos Process ◽  
Power Supply Voltage ◽  
Negative Power ◽  
Current Mode Control ◽  
Mode Control ◽  
Digital Still Camera ◽  
Simulation Results

Mobile equipment such as organic-EL display, digital still camera and so on re-quire both positive and negative power supply voltage to obtain high quality. Single InductorMultiple-Output (SIMO) DC-DC converter can provide a pair of positive and negative outputvoltages with only one external inductor. This paper describes SIMO DC-DC Converter usingproposed current-mode control (CMC) circuit. The proposed CMC circuit realizes high responsespeed for the change of load current. Spectre simulations with 0.18m CMOS process parameterare performed to verify the validity of the proposed converter. The simulation results indicatethat the proposed converter has higher response time compared with conventional converter.

scholarly journals Circuit Implementation, Operation, and Simulation of Multivalued Nonvolatile Static Random Access Memory Using a Resistivity Change Device

2013 ◽  
Vol 2013 ◽  
pp. 1-9
Author(s):  
Kazuya Nakayama ◽  
Akio Kitagawa
Keyword(s):  
Power Supply ◽  
Supply Voltage ◽  
Random Access ◽  
Random Access Memory ◽  
Static Random Access Memory ◽  
Access Memory ◽  
Power Supply Voltage ◽  
Sram Cell ◽  
Variation Tolerance ◽  
Recall Operation

We proposed and computationally analyzed a multivalued, nonvolatile SRAM using a ReRAM. Two reference resistors and a programmable resistor are connected to the storage nodes of a standard SRAM cell. The proposed 9T3R MNV-SRAM cell can store 2 bits of memory. In the storing operation, the recall operation and the successive decision operation of whether or not write pulse is required can be performed simultaneously. Therefore, the duration of the decision operation and the circuit are not required when using the proposed scheme. In order to realize a stable recall operation, a certain current (or voltage) is applied to the cell before the power supply is turned on. To investigate the process variation tolerance and the accuracy of programmed resistance, we simulated the effect of variations in the width of the transistor of the proposed MNV-SRAM cell, the resistance of the programmable resistor, and the power supply voltage with 180 nm 3.3 V CMOS HSPICE device models.

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