High performance normally-off Al2O3/GaN MOSFETs with record high threshold voltage by interface charge engineering

2016 ◽  
Author(s):  
Ruopu Zhu ◽  
Qi Zhou ◽  
A. Zhang ◽  
Y. Shi ◽  
Z. Wang ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
High Performance ◽  
High Threshold ◽  
Interface Charge

7.6 V Threshold Voltage High-Performance Normally-Off Al2O3/GaN MOSFET Achieved by Interface Charge Engineering

2016 ◽  
Vol 37 (2) ◽  
pp. 165-168 ◽  
Author(s):  
Qi Zhou ◽  
Li Liu ◽  
Anbang Zhang ◽  
Bowen Chen ◽  
Yang Jin ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
High Performance ◽  
Interface Charge

scholarly journals A Novel GaN Metal-Insulator-Semiconductor High Electron Mobility Transistor Featuring Vertical Gate Structure

Micromachines ◽  
2019 ◽  
Vol 10 (12) ◽  
pp. 848
Author(s):  
Zhonghao Sun ◽  
Huolin Huang ◽  
Nan Sun ◽  
Pengcheng Tao ◽  
Cezhou Zhao ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Electron Mobility ◽  
Computer Aided Design ◽  
High Performance ◽  
High Electron Mobility Transistors ◽  
High Electron Mobility Transistor ◽  
Uniform Electric Field ◽  
High Threshold ◽  
High Electron ◽  
High Electron Mobility

A novel structure scheme by transposing the gate channel orientation from a long horizontal one to a short vertical one is proposed and verified by technology computer-aided design (TCAD) simulations to achieve GaN-based normally-off high electron mobility transistors (HEMTs) with reduced on-resistance and improved threshold voltage. The proposed devices exhibit high threshold voltage of 3.1 V, high peak transconductance of 213 mS, and much lower on-resistance of 0.53 mΩ·cm2 while displaying better off-state characteristics owing to more uniform electric field distribution around the recessed gate edge in comparison to the conventional lateral HEMTs. The proposed scheme provides a new technical approach to realize high-performance normally-off HEMTs.

LEAKAGE POWER REDUCTION OF ASYNCHRONOUS PIPELINES

2011 ◽  
Vol 20 (02) ◽  
pp. 207-222
Author(s):  
BEHNAM GHAVAMI ◽  
HOSSEIN PEDRAM ◽  
AREZOO SALARPOUR
Keyword(s):  
Threshold Voltage ◽  
High Performance ◽  
Graph Model ◽  
Cmos Technology ◽  
Leakage Power ◽  
Total Power ◽  
High Threshold ◽  
Single Chip ◽  
Technology Scaling ◽  
Performance Penalty

With CMOS technology scaling, leakage power is expected to become a significant portion of the total power. A dual-threshold CMOS circuit, which has both high and low threshold transistors in a single chip, can be used to deal with the leakage problem in high performance applications. This paper presents dual-threshold voltage technique for reducing leakage power dissipation of Quasi Delay Insensitive asynchronous pipelines while still maintaining high performance of these circuits. We exploited the Dependency Graph model to produce a formal performance analysis. In order to reduce leakage power an efficient algorithm for selecting and assigning high threshold voltage to templates of a pipeline is proposed. Results obtained indicate that our proposed technique can achieve on average 40% savings for leakage power, while there is no performance penalty.

1200 V SiC IE-UMOSFET with Low On-Resistance and High Threshold Voltage

2017 ◽  
Vol 897 ◽  
pp. 497-500 ◽  
Author(s):  
Shinsuke Harada ◽  
Yusuke Kobayashi ◽  
A. Kinoshita ◽  
N. Ohse ◽  
Takahito Kojima ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Gate Voltage ◽  
Gate Oxide ◽  
Critical Issue ◽  
High Threshold ◽  
Trade Off ◽  
Negative Gate Voltage

A critical issue with the SiC UMOSFET is the need to develop a shielding structure for the gate oxide at the trench bottom without any increase in the JFET resistance. This study describes our new UMOSFET named IE-UMOSFET, which we developed to cope with this trade-off. A simulation showed that a low on-resistance is accompanied by an extremely low gate oxide field even with a negative gate voltage. The low RonA was sustained as Vth increases. The RonA values at VG=25 V (Eox=3.2 MV/cm) and VG=20V (Eox=2.5 MV/cm), respectively, for the 3mm x 3mm device were 2.4 and 2.8 mWcm2 with a lowest Vth of 2.4 V, and 3.1 and 4.4 mWcm2 with a high Vth of 5.9 V.

Normally-off operation AlGaN/GaN MOS-HEMT with high threshold voltage

2010 ◽  
Vol 46 (18) ◽  
pp. 1280 ◽  
Author(s):  
C.-T. Chang ◽  
T.-H. Hsu ◽  
E.Y. Chang ◽  
Y.-C. Chen ◽  
H.-D. Trinh ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
High Threshold

Effect of High Temperature Forming Gas Annealing on Electrical Properties of 4H-SiC Lateral MOSFETs with Lanthanum Silicate and ALD SiO2 Gate Dielectric

2018 ◽  
Vol 924 ◽  
pp. 482-485
Author(s):  
Min Seok Kang ◽  
Kevin Lawless ◽  
Bong Mook Lee ◽  
Veena Misra
Keyword(s):  
Threshold Voltage ◽  
Interfacial Layer ◽  
Field Effect ◽  
Lanthanum Oxide ◽  
Gate Dielectric ◽  
High Mobility ◽  
High Threshold ◽  
Field Effect Mobility ◽  
The Impact ◽  
Lanthanum Silicate

We investigated the impact of an initial lanthanum oxide (La2O3) thickness and forming gas annealing (FGA) conditions on the MOSFET performance. The FGA has been shown to dramatically improve the threshold voltage (VT) stability of 4H-SiC MOSFETs. The FGA process leads to low VTshift and high field effect mobility due to reduction of the interface states density as well as traps by passivating the dangling bonds and active traps in the Lanthanum Silicate dielectrics. By optimizing the La2O3interfacial layer thickness and FGA condition, SiC MOSFETs with high threshold voltage and high mobility while maintaining minimal VTshift are realized.

scholarly journals Different electrode anodes used in OLED devices Diferentes eletrodos anodos usados em dispositivos OLEDs

2021 ◽  
Author(s):  
Emerson Roberto Santos ◽  
Thiago de Carvalho Fullenbach ◽  
Marina Sparvoli Medeiros ◽  
Luis da Silva Zambom ◽  
Roberto Koji Onmori ◽  
...  
Keyword(s):  
Thin Films ◽  
Tin Oxide ◽  
Threshold Voltage ◽  
Indium Tin Oxide ◽  
Light Emitting Diode ◽  
Electrical Current ◽  
High Threshold ◽  
Diamond Coatings ◽  
Ito Thin Films ◽  
Order Of Magnitude

Transparent conductive oxides (TCOs) known as indium tin oxide (ITO) and fluorine tin oxide (FTO) deposited on glass were compared by different techniques and also as anodes in organic light-emitting diode (OLED) devices with same structure. ITO produced at laboratory was compared with the commercial one manufactured by different companies: Diamond Coatings, Displaytech and Sigma-Aldrich, and FTO produced at laboratory was compared with the commercial one manufactured by Flexitec Company. FTO thin films produced at laboratory presented the lowest performance measured by Hall effect technique and also by I-V curve of OLED device with low electrical current and high threshold voltage. ITO thin films produced at laboratory presented elevated sheet resistance in comparison with commercial ITOs (approximately one order of magnitude greater), that can be related by a high number of defects as discontinuity of the chemical lattice or low crystalline structure. In the assembly of OLED devices with ITO and FTO produced at laboratory, neither presented luminances. ITO manufactured by Sigma-Aldrich company presented better electrical and optical characteristics, as low electrical resistivity, good wettability, favorable transmittance, perfect physicalchemical stability and lowest threshold voltage (from 3 to 4.5 V) for OLED devices.

scholarly journals High Threshold Voltage Normally off Ultra-Thin-Barrier GaN MISHEMT with MOCVD-Regrown Ohmics and Si-Rich LPCVD-SiNx Gate Insulator

Energies ◽  
2020 ◽  
Vol 13 (10) ◽  
pp. 2479
Author(s):  
Hsiang-Chun Wang ◽  
Hsien-Chin Chiu ◽  
Chong-Rong Huang ◽  
Hsuan-Ling Kao ◽  
Feng-Tso Chien
Keyword(s):  
Threshold Voltage ◽  
Gate Insulator ◽  
High Threshold ◽  
Potential Candidate ◽  
Channel Mobility ◽  
Switching Power ◽  
Selective Area ◽  
Inversion Channel ◽  
Threshold Voltage Distribution ◽  
Dimensional Electron Gas

A high threshold voltage (VTH) normally off GaN MISHEMTs with a uniform threshold voltage distribution (VTH = 4.25 ± 0.1 V at IDS = 1 μA/mm) were demonstrated by the selective area ohmic regrowth technique together with an Si-rich LPCVD-SiNx gate insulator. In the conventional GaN MOSFET structure, the carriers were induced by the inversion channel at a high positive gate voltage. However, this design sacrifices the channel mobility and reliability because a huge number of carriers are beneath the gate insulator directly during operation. In this study, a 3-nm ultra-thin Al0.25Ga0.75N barrier was adopted to provide a two-dimensional electron gas (2DEG) channel underneath the gate terminal and selective area MOCVD-regrowth layer to improve the ohmic contact resistivity. An Si-rich LPCVD-SiNx gate insulator was employed to absorb trace oxygen contamination on the GaN surface and to improve the insulator/GaN interface quality. Based on the breakdown voltage, current density, and dynamic RON measured results, the proposed LPCVD-MISHEMT provides a potential candidate solution for switching power electronics.

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