Characteristics of High-Speed Silicon Carbide (Sic) Power Transistors

2007 ◽  
Author(s):  
Johnson A. Asumadu ◽  
James D. Scofield
Keyword(s):  
Silicon Carbide ◽  
High Speed ◽  
Power Transistors

Cause of Etch Pits during the High Speed Plasma Etching of Silicon Carbide and an Approach to Reduce their Size

2020 ◽  
Vol 1004 ◽  
pp. 161-166
Author(s):  
Yuma Nakanishi ◽  
Risa Mukai ◽  
Satoshi Matsuyama ◽  
Kazuto Yamauchi ◽  
Yasuhisa Sano
Keyword(s):  
Silicon Carbide ◽  
High Pressure ◽  
Plasma Etching ◽  
High Speed ◽  
Removal Rate ◽  
Etch Pits ◽  
Power Transistors ◽  
Pressure Plasma ◽  
Device Processing ◽  
High Removal Rate

To reduce the on-resistance in vertical power transistors, backside thinning is required after device processing. However, it is difficult to thin silicon carbide (SiC) wafers with a high removal rate by conventional mechanical processing because their hardness and brittleness cause cracks and chips during thinning. Therefore, the authors have attempted to thin SiC wafers using plasma chemical vaporization machining (PCVM), which is plasma etching using high-pressure plasma. PCVM has a high removal rate because of the high radical density in the high-pressure plasma, and it does not form a damaged layer on the processed surface because of the low ion energy. The authors have already achieved a very high removal rate of 15.6 μm/min by PCVM. However, many etch pits were generated on the wafer during PCVM in these high-speed machining conditions. Therefore, this study, using molten potassium hydroxide (KOH) etching, investigated the cause of such etch pits and found that they may stem from threading screw dislocation in the wafers. In addition, this research considered a process for reducing an etch pit size and succeeded in doing so by controlling wafer temperature.

Effect of Powder-Mixed Dielectric on EDM Process Performance

2020 ◽  
Vol 38 (8A) ◽  
pp. 1226-1235
Author(s):  
Safa R. Fadhil ◽  
Shukry. H. Aghdeab
Keyword(s):  
Silicon Carbide ◽  
High Speed ◽  
Electrical Discharge Machining ◽  
Removal Rate ◽  
High Speed Steel ◽  
Transformer Oil ◽  
Dielectric Fluid ◽  
Peak Current ◽  
Powder Concentration ◽  
Pulse On Time

Electrical Discharge Machining (EDM) is extensively used to manufacture different conductive materials, including difficult to machine materials with intricate profiles. Powder Mixed Electro-Discharge Machining (PMEDM) is a modern innovation in promoting the capabilities of conventional EDM. In this process, suitable materials in fine powder form are mixed in the dielectric fluid. An equal percentage of graphite and silicon carbide powders have been mixed together with the transformer oil and used as the dielectric media in this work. The aim of this study is to investigate the effect of some process parameters such as peak current, pulse-on time, and powder concentration of machining High-speed steel (HSS)/(M2) on the material removal rate (MRR), tool wear rate (TWR) and the surface roughness (Ra). Experiments have been designed and analyzed using Response Surface Methodology (RSM) approach by adopting a face-centered central composite design (FCCD). It is found that added graphite-silicon carbide mixing powder to the dielectric fluid enhanced the MRR and Ra as well as reduced the TWR at various conditions. Maximum MRR was (0.492 g/min) obtained at a peak current of (24 A), pulse on (100 µs), and powder concentration (10 g/l), minimum TWR was (0.00126 g/min) at (10 A, 100 µs, and 10 g/l), and better Ra was (3.51 µm) at (10 A, 50 µs, and 10 g/l).

scholarly journals Short-Circuit Capability Exploration of Silicon Carbide Devices

2015 ◽  
Vol 821-823 ◽  
pp. 810-813 ◽  
Author(s):  
Maxime Berthou ◽  
Dominique Planson ◽  
Dominique Tournier
Keyword(s):  
Silicon Carbide ◽  
Short Circuit ◽  
Electronic Systems ◽  
Power Electronic ◽  
Power Transistor ◽  
Power Transistors ◽  
Capacitive Load ◽  
Short Circuit Condition

With the commercial availability of SiC power transistors, this decade will mark an important breakthrough in power transistor technology. However, in power electronic systems, disturbances may place them in short-circuit condition and little knowledge exist about their SC capability. This paper presents our study of SiC MOSFETs, JFETs and BJT under capacitive load short-circuit up to 600V.

High-speed processing of silicon carbide ceramic by high repetition frequency femtosecond laser

2021 ◽  
Author(s):  
Jian Zhang ◽  
Feng Geng ◽  
Zhichao Liu ◽  
Qinghua Zhang ◽  
Qiao Xu ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Femtosecond Laser ◽  
High Speed ◽  
Repetition Frequency ◽  
Silicon Carbide Ceramic ◽  
High Repetition

Attritious Wear of Silicon Carbide

1976 ◽  
Vol 98 (4) ◽  
pp. 1125-1134 ◽  
Author(s):  
R. Komanduri ◽  
M. C. Shaw
Keyword(s):  
Silicon Carbide ◽  
Electron Microscope ◽  
High Temperature ◽  
High Speed ◽  
Layer By Layer ◽  
Wear Area ◽  
Work Material ◽  
Transmission Electron ◽  
Metal Silicides ◽  
Boundary Fracture

Attritious wear of silicon carbide in simulated grinding tests against a cobalt base superalloy at high speed and extremely small feed rate was studied using a scanning electron microscope (SEM) and an auger electron spectroscope (AES). In many cases the wear area of silicon carbide was found to be concave rather than planar in shape. Several microcracks and grain boundary fracture were also observed. No evidence of metal build-up was observed on silicon carbide which was not the case with aluminum oxide. AES study of the rubbed surface on the work material and transmission electron microscope (TEM) investigation of the wear debris suggest that attritious wear of silicon carbide is due to one or more of the following mechanisms: 1 – Preferential removal of surface atoms on the abrasive, layer by layer, by oxidation under high temperature and a favorably directed shear stress; 2 – disassociation of silicon carbide at high temperature and (a) diffusion of silicon into the work material and formation of metal silicides and (b) diffusion of carbon into the work material and formation of unstable metal carbides (in the present case Ni3C and Co3C) which decompose during cooling to metal and carbon atoms; 3 – pinocoidal cleavage fracture of silicon carbide on basal planes c(0001) resulting in the removal of many micron-sized crystallites.

scholarly journals Efficiency Optimization for All-Silicon Carbide (SiC) PWM Rectifier Considering the Impact of Gate-Source Voltage Interference

Energies ◽  
2020 ◽  
Vol 13 (6) ◽  
pp. 1421
Author(s):  
Zhijun Li ◽  
Zuoxing Wang ◽  
Trillion Zheng ◽  
Hong Li ◽  
Bo Huang ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
High Speed ◽  
Field Effect Transistors ◽  
Pwm Rectifier ◽  
Efficiency Optimization ◽  
Conversion System ◽  
Source Voltage ◽  
Pwm Rectifiers ◽  
The Impact ◽  
High Speed Switching

Compared with conventional silicon (Si)-based Pulse Width Modulation (PWM) rectifiers, PWM rectifiers based on silicon carbide (SiC) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) have significant technical advantages and broad application prospects in terms of efficiency and power density, inherited from the high-speed switching feature. However, high-speed switching also induces gate-source voltage interference, which impacts the overall character of the conversion system. This paper considered the impact of gate-source voltage interference on loss, revealing an efficiency optimization for all-SiC PWM rectifiers. Firstly, this paper theoretically investigated the mechanism of improving the conversion system efficiency by using the 4-pin Kelvin packaged SiC MOSFETs. Then, based on the industrial product case study, loss distribution, using different package styles, was quantitatively analyzed. Finally, experiment test results verified the efficiency improvement of the PWM rectifier with the 4-pin Kelvin package SiC MOSFETs.

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