Work-Function Engineering of Source-Overlapped Dual-Gate Tunnel Field-Effect Transistor

2018 ◽  
Vol 18 (9) ◽  
pp. 5925-5931 ◽  
Author(s):  
Ju Chan Lee ◽  
Tae Jun Ahn ◽  
Yun Seop Yu

Tunnel Field Effect Transistor (TFET) is gated reverse biased P-I-N diode structured semiconductor device and can be considered as a reliable low power device. TCAD (Sentaurus 2D) simulations for various Gate metal work function (4.1-4.3 eV) shows that its ON-current (ION) arises from quantum mechanical band-to-band tunneling (B2BT) and observed that threshold Voltage (VT) for TFET decreases with increase in Gate metal work function. The thermionic emission of electrons in MOSFET limits the sub-threshold swing (SS) by 60 mV/dec whereas TFET has potential for low SS ie. SS<60 mV/dec. TCAD Simulations confirmed that that the Gate – Drain capacitance (Cgd) strongly follows the Gate capacitance (Cgg) all over the voltage range (0-0.9V) which increases the miller capacitance for TFET. It is investigated that for TFET, the injection of carriers into the channel is through B2BT which effectively couples the Gate charge to the Drain. A look up table based Verilog-A model is generated for TFET and used to simulate the static and dynamic behavior of TFET based digital circuit in Cadence spectre. Miller effect causes the peak voltage overshoots are noticed at the drain side during transient responses and can be responsible for dynamic power loss and high turn ON/OFF delay


2021 ◽  
Vol 7 (1) ◽  
Author(s):  
Priyadarshini N D ◽  
Nayana G H ◽  
P Vimala

Tunnel Field Effect Transistors (TFET) have demonstrated to have likely applications in the cutting-edge low force and super low force semiconductors to substitute the conventional FETs. TFET will be able to provide steep inverse subthreshold swing slope also maintaining a low leakage current, making it an essential structure for limiting the power consumption in Metal Oxide Semiconductor FETs.In this paper, we are simulating different structures of TFET by varying source material to boost the ON current of the device. The different models are designed and simulated using Silvaco TCAD simulator and transfer characteristics are studied.


Micromachines ◽  
2020 ◽  
Vol 11 (8) ◽  
pp. 780
Author(s):  
Jang Hyun Kim ◽  
Hyun Woo Kim ◽  
Young Suh Song ◽  
Sangwan Kim ◽  
Garam Kim

In this paper, an investigation is performed to analyze the L-shaped tunnel field-effect transistor (TFET) depending on a gate work function variation (WFV) with help of technology computer-aided design (TCAD) simulation. Depending on the gate voltage, the three variations occur in transfer curves. The first one is the on-state current (ION) variation, the second one is the hump current (IHUMP) variation, and the last one is ambipolar current (IAMB) variation. According to the simulation results, the ION variation is sensitive depending on the size of the tunneling region and could be reduced by increasing the tunneling region. However, the IHUMP and IAMB variations are relatively irrelevant to the size of the tunneling region. In order to analyze the cause of this difference, we investigated the band-to-band tunneling (BTBT) rate according to WFV cases. The results show that when ION is formed in L-shaped TFET, the BTBT rate relies on the WFV in the whole region of the gate because the tunnel barrier is formed in the entire area where the source and the gate meet. On the other hand, when the IHUMP and IAMB are formed in L-shaped TFET, the BTBT rate relies on the WFV in the edge of the gate.


2020 ◽  
Vol 20 (7) ◽  
pp. 4182-4187
Author(s):  
Ye Sung Kwon ◽  
Seong-Hyun Lee ◽  
Yoon Kim ◽  
Garam Kim ◽  
Jang Hyun Kim ◽  
...  

The tunnel field-effect transistor (TFET) with surrounding channel nanowire (SCNW) structure promises better performance than the conventional planar TFET in terms of subthreshold swing (SS) and on-current (ION). In spite of the advantages of SCNW TFET, there are some technical issues in the aspects of a hump phenomenon in subthreshold region and a high ambipolar current (IAMB) in off-state. In order to overcome these issues, a novel dual-gate SCNW TFET (DG-SCNW TFET) with differential gate work functions (WFs) and a gate-drain underlap is proposed and studied by using technology computer-aided design (TCAD) simulation. In addition, a hetero-junction with SiGe source is applied to improve the device performance. Finally, it is confirmed that the optimized DG-SCNW TFET shows the remarkable performance comparing with the control device.


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