A novel high swing, low power charge pump circuit with excellent current matching

2016 ◽  
Author(s):  
Noushin Ghaderi ◽  
Ali Dehghani
Keyword(s):  
Low Power ◽  
Charge Pump ◽  
Current Matching ◽  
Charge Pump Circuit

scholarly journals Phase Frequency Detector and Charge Pump for Low Jitter PLL Applications

2018 ◽  
Vol 8 (6) ◽  
pp. 4120
Author(s):  
Sung Sik Park ◽  
Ju Sang Lee ◽  
Sang Dae Yu
Keyword(s):  
Circuit Simulation ◽  
Pulse Height ◽  
Charge Pump ◽  
Cmos Process ◽  
Charge Pumps ◽  
Current Matching ◽  
Low Jitter ◽  
A New Technique ◽  
Charge Pump Circuit ◽  
Frequency Detector

In this paper a new technique is presented to improve the jitter performance of conventional phase frequency detectors by completely removing the unnecessary one-shot pulse. This technique uses a variable pulse-height circuit to control the unnecessary one-shot pulse height. In addition, a novel charge-pump circuit with perfect current-matching characteristics is used to improve the output jitter performance of conventional charge pumps. This circuit is composed of a pair of symmetrical pump circuits to obtain a good current matching. As a result, the proposed charge-pump circuit has perfect current-matching characteristics, wide output range, no glitch output current, and no jump output voltage. In order to verify such operation, circuit simulation is performed using 0.18 μm CMOS process parameters.

A high efficiency charge pump circuit for low power applications

2010 ◽  
Vol 31 (1) ◽  
pp. 015009 ◽  
Author(s):  
Feng Peng ◽  
Li Yunlong ◽  
Wu Nanjian
Keyword(s):  
Low Power ◽  
High Efficiency ◽  
Charge Pump ◽  
Charge Pump Circuit

A LOW-VOLTAGE LOW-POWER CMOS PHASE-LOCKED LOOP

2005 ◽  
Vol 14 (05) ◽  
pp. 997-1006 ◽  
Author(s):  
ROBERT C. CHANG ◽  
LUNG-CHIH KUO ◽  
HOU-MING CHEN
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Supply Voltage ◽  
Charge Pump ◽  
Phase Locked Loop ◽  
Loop Filter ◽  
Phase Frequency Detector ◽  
Low Power Cmos ◽  
Charge Pump Circuit ◽  
Frequency Detector

A low-voltage low-power CMOS phase-locked loop (PLL) is presented in this paper. It consists of a phase frequency detector, a charge pump, a loop filter, a voltage-control oscillator, and a frequency divider. A new phase frequency detector is proposed to reduce the dead zone and the mismatch effect of the charge pump circuit. A novel charge pump circuit with a small area and wide output range is described. The PLL circuit has been designed using the TSMC 0.35 μm 1P4M CMOS technology. The chip area is 1.08 mm × 1.01 mm. The post-layout simulation results show that the frequency of 900 MHz can be generated with a single supply voltage of 1.5 V. The power dissipation of the circuit is 9.17 mW.

A monolithic low-power-consumption driver circuit based on a Dickson charge pump for MEMS actuator applications

2020 ◽  
Vol 164 ◽  
pp. 107683 ◽  
Author(s):  
Hui Peng ◽  
Herbert De Pauw ◽  
Pieter Bauwens ◽  
Jan Doutreloigne
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Charge Pump ◽  
Low Power Consumption ◽  
Driver Circuit
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