Multipurpose quick 3D packaging process

Author(s):  
Zhao Yongrui ◽  
Ma Hongbo ◽  
Bi Minglu ◽  
Huang Zhanwu ◽  
Jia Jun ◽  
...  
2006 ◽  
Vol 970 ◽  
Author(s):  
Toshiro Mitsuhashi ◽  
Yoshimi Egawa ◽  
Osamu Kato ◽  
Yoshihiro Saeki ◽  
Hidekazu Kikuchi ◽  
...  

ABSTRACTA 3D packaging technology for 4 Gbit DRAM has been developed. It is targeting to realize 4Gb density DRAM by stacking 8-DRAM chips into one package. Interconnect between stacked chips will be done by through-silicon-via for the requirement of 3Gbps operation. Key process technologies for chip stacking are through-silicon-via formation, wafer back side process and micro-bump bonding. These chip-stacking processes have been developing using TEG, which can evaluate electrical characteristics.


2017 ◽  
Vol 137 (2) ◽  
pp. 48-58
Author(s):  
Noriyuki Fujimori ◽  
Takatoshi Igarashi ◽  
Takahiro Shimohata ◽  
Takuro Suyama ◽  
Kazuhiro Yoshida ◽  
...  

Author(s):  
K. Sanchez ◽  
G. Bascoul ◽  
F. Infante ◽  
N. Courjault ◽  
T. Nakamura

Abstract Magnetic field imaging is a well-known technique which gives the possibility to study the internal activity of electronic components in a contactless and non-invasive way. Additional data processing can convert the magnetic field image into a current path and give the possibility to identify current flow anomalies in electronic devices. This technique can be applied at board level or device level and is particularly suitable for the failure analysis of complex packages (stacked device & 3D packaging). This approach can be combined with thermal imaging, X-ray observation and other failure analysis tool. This paper will present two different techniques which give the possibility to measure the magnetic field in two dimensions over an active device. Same device and same level of current is used for the two techniques to give the possibility to compare the performance.


Author(s):  
Erika Schutte ◽  
Jack Martin

Abstract An ellipsometry based measurement protocol was developed to evaluate changes to MEMS sensor surfaces which may occur during packaging using unpatterned test samples. This package-level technique has been used to measure the 0-20 Angstrom thin films that can form or deposit on die during the packaging process for a variety of packaging processing conditions. Correlations with device performance shows this to be a useful tool for packaged MEMS device and process characterization.


Author(s):  
Zhiheng Huang ◽  
Zhiyong Wu ◽  
Hua Xiong ◽  
Yucheng Ma

Abstract Microstructure and its effect on mechanical behavior of ultrafine interconnects have been studied in this paper using a modeling approach. The microstructure from the processes of solidification, spinodal decomposition, and grain growth in ultrafine interconnects has highlighted its importance. The size, geometry and composition of interconnects as well as the elastic energy can influence microstructure and thus the mechanical behavior. Quantification of microstructure in ultrafine interconnects is a necessary step to establish the linkage between microstructure and reliability.


Author(s):  
Amin Rida ◽  
Li Yang ◽  
Napol Chaisilwattana ◽  
Scott Travis ◽  
Swapan Bhattacharya ◽  
...  

2013 ◽  
Vol 2013 ◽  
pp. 1-6 ◽  
Author(s):  
Che-Jung Chang ◽  
Der-Chiang Li ◽  
Wen-Li Dai ◽  
Chien-Chih Chen

The wafer-level packaging process is an important technology used in semiconductor manufacturing, and how to effectively control this manufacturing system is thus an important issue for packaging firms. One way to aid in this process is to use a forecasting tool. However, the number of observations collected in the early stages of this process is usually too few to use with traditional forecasting techniques, and thus inaccurate results are obtained. One potential solution to this problem is the use of grey system theory, with its feature of small dataset modeling. This study thus uses the AGM(1,1) grey model to solve the problem of forecasting in the pilot run stage of the packaging process. The experimental results show that the grey approach is an appropriate and effective forecasting tool for use with small datasets and that it can be applied to improve the wafer-level packaging process.


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