Abstract. Many adiabatic logic families make use of multi phase trapezoidal or sinusoidal power clocks to recover the energy stored in the load capacitances. A key aspect for the evaluation of the performance of adiabatic logic is then the study of a system that includes the power clock generator. A four-phase trapezoidal power clock generator, according to the requirements of the most promising architectures, namely the ECRL and PFAL, has been designed and simulated. The proposed circuit, realized with a double-well 0.25 µm CMOS technology and external inductors, is a resonant generator designed to oscillate at a frequency of 7 MHz, which is within the optimum frequency range for adiabatic circuits realized with this CMOS technology. The generator has been simulated with the equivalent load of fifty 1-bit adders and the operating behavior of a 4-bit adder has been evaluated. The key aspects of a generator for adiabatic logic are its power consumption and the phase relationships between its output signals. The proposed generator has a conversion efficiency higher than 80%, and it is robust with respect to variations of technology parameters. The four power supplies exhibit the correct relationship of phase also in the presence of no equally distributed loads.
Resonant 90 degree shifter generator for 4-phase trapezoidal adiabatic logic
