A Simple Zero-Sequence Voltage Injection Method for Carrier-Based Pulse-Width Modulation of the Three-Level NPC Inverter

2020 ◽  
pp. 1-1
Author(s):  
Fa Chen ◽  
Wei Qiao ◽  
Hongmei Wang ◽  
Liyan Qu
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Simple Zero ◽  
Injection Method ◽  
Zero Sequence ◽  
Zero Sequence Voltage

scholarly journals A Virtual Negative Resistor Based Common Mode Current Resonance Suppression Method for Three-Level Grid-Tied Inverter with Discontinuous PWM

Energies ◽  
2020 ◽  
Vol 13 (7) ◽  
pp. 1595
Author(s):  
Qiyu Li ◽  
Hongwei Zhou ◽  
Jiansong Zhang ◽  
Shengdun Zhao ◽  
Jingfeng Lu
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Neutral Point ◽  
Resonance Problem ◽  
Common Mode ◽  
Zero Sequence ◽  
In Series ◽  
Suppression Method ◽  
Lc Filter ◽  
Control Quantity

The output LC filter of a photovoltaic (PV) string three-level grid-tied inverter that connects the filter capacitor neutral point to dc-link capacitor neutral point can reduce the common-mode (CM) current injected to the grid by letting the CM current circulate within the inverter. However, the internal CM current may resonate because of the existence of the resonant frequency of the internal CM LC circuit. Compared with the traditional continuous pulse-width modulation (CPWM), the resonance can be worse if discontinuous pulse-width modulation (DPWM) is applied, for the zero sequence quantity of DPWM contains more harmonics than that of CPWM. In this paper, a virtual negative resistor based common mode current resonance suppression method for a three-level grid-tied inverter is proposed to overcome the CM current resonance problem in DPWM application. Different positions of the virtual negative resistor in the equivalent CM circuit with different feedback variables are analyzed theoretically. The virtual negative resistor connected in series with the inductor in the equivalent CM circuit is selected to damp the CM current resonance for simplification and damping performance. Different from the implementation in CPWM where a pair of small voltage vectors exist and are used to adjust the CM voltage directly, the proposed method for DPWM application is implemented indirectly by adding the CM adjustment quantity to differential-mode (DM) control quantity with appropriate coefficients. Depending on the sector of DM control quantity in the α β reference frame, the coefficients are calculated using one of three specific voltage vectors. Experimental results are given to demonstrate the effectiveness of theoretical analyses and the proposed method.

scholarly journals Experimental Validation of Shared Inverter Topology to Drive Multi AC-Loads

2018 ◽  
Vol 8 (2) ◽  
pp. 793 ◽  
Author(s):  
Saher Albatran ◽  
Issam A. Smadi ◽  
Mohammad A. Alsyouf
Keyword(s):  
Pulse Width ◽  
Experimental Validation ◽  
Pulse Width Modulation ◽  
Nonlinear Loads ◽  
Dc Voltage ◽  
Three Phase ◽  
Field Programmable ◽  
Zero Sequence ◽  
Signal Injection ◽  
Inverter Topology

Many reduced-switch-count (RSC) inverter topologies have been proposed in the literature. As the number of switches required to produce a set of voltages in RSC inverters are less than that in conventional inverter, as a result utilizing RSC inverters in a certain system reduces its size and cost. In this paper, a novel RSC shared inverter topology consisting of fifteen switches and capable of driving four three-phase AC-loads independently is proposed and experimentally verified. A carrier-based pulse width modulation (PWM) technique that employs the zero-sequence-signal injection principle is developed to drive the proposed inverter along with adequate DC voltage bus utilization between the shared loads for common frequency (CF) as well as different frequency (DF) modes. The structure and the principle of operation of the proposed inverter are introduced and intensively verified using simulation and field-programmable-gate-array (FPGA)-in-the-loop simulation under linear and nonlinear loads. Then, Inverter prototype was built and the proposed inverter has been verified experimentally. The experimental results verify the applicability of the proposed inverter and the employed PWM.

Integrated DC-AC and AC-DC converter using H-converter for wide range voltage applications

Circuit World ◽  
2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Saravanan R. ◽  
Vijayshankar S. ◽  
Sathyaseelan Sathyaseelan ◽  
Suresh K.
Keyword(s):  
Pulse Width ◽  
Power Loss ◽  
Pulse Width Modulation ◽  
Modulation Scheme ◽  
Power Losses ◽  
Content Type ◽  
One Stage ◽  
Energy Storage Application ◽  
Wide Range ◽  
Zero Sequence

Purpose This paper aims to propose Hidden Converter (H-Converter) combined with dual port 3Ø inverter for energy storage application to produce wide range of voltage. Some of the application required wide range of voltages, but problem from E-chopper is either boost or buck mode of operations, both modes are not possible. To overcome this drawback, H-Converter is combined with dual port 3Ø inverter controlled by carrier-based pulse width modulation (CB-PWM) technique is added with zero sequence injection. Design/methodology/approach Hidden converter is a bidirectional DC-DC chopper used to convert fixed DC to variable DC and vice versa in both buck and boost modes of operations. Dual port inverter is combined with hidden DC-DC converter can produce wide range of voltages. Findings The bidirectional DC-AC converter requires less power for processing and consumes less power losses by using modest carrier built- pulse width modulation scheme through proposed zero structure addition. Originality/value By using this proposed strategy H-Converter can produce wide range of voltage in both the sides and mostly power is processed in the 3Ø inverter with a one stage conversion with less power loss. As a result, with one stage power conversion has more efficiency because of less power loss. This proposed converter has designed by analysis, and the real time result is tested in an experiment.

Applications of Two Level SVPWM in the Cascade Multilevel Carrier-Based PWM

2014 ◽  
Vol 556-562 ◽  
pp. 1939-1944
Author(s):  
Zuo Ming Liu ◽  
Zi Qiang Xi ◽  
Chen Guang Yu
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Space Vector Modulation ◽  
Switching Loss ◽  
Space Vector ◽  
Main Work ◽  
Zero Sequence ◽  
Vector Modulation ◽  
Level Converter

First of all, this paper speculates that the essence of the space vector pulse width modulation (SVPWM) is the injection of some kind of zero sequence component through the theoretical analysis. Increasing the range of output voltage and reducing the switching loss are the optimization it can realize, the essential realization method is implemented by changing the placement of zero space vector. Then the method is applied to the cascade multilevel carrier modulation. The main work of this paper is to analyze the relation between SVPWM and the carrier PWM in the two level converter, then add the discrete modulation into the cascade multilevel carrier modulation to verify that the space vector modulation can be realized in cascade multilevel and can get similar results with the two level.

Parallel-Connected Photovoltaic Inverters: Zero Frequency Sequence Harmonic Analysis and Solution

2013 ◽  
Vol 14 (2) ◽  
pp. 199-206
Author(s):  
Maria Stefania Carmeli ◽  
Marco Mauri ◽  
Luisa Frosio ◽  
Alberto Bezzolato ◽  
Gabriele Marchegiani
Keyword(s):  
Theoretical Analysis ◽  
High Power ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Point Of View ◽  
Generation System ◽  
Parallel Connection ◽  
Zero Sequence ◽  
Frequency Sequence ◽  
Zero Frequency

AbstractHigh-power photovoltaic (PV) plants are usually constituted of the connection of different PV subfields, each of them with its interface transformer. Different solutions have been studied to improve the efficiency of the whole generation system. In particular, transformerless configurations are the more attractive one from efficiency and costs point of view. This paper focuses on transformerless PV configurations characterised by the parallel connection of interface inverters. The problem of zero sequence current due to both the parallel connection and the presence of undesirable parasitic earth capacitances is considered and a solution, which consists of the synchronisation of pulse-width modulation triangular carrier, is proposed and theoretically analysed. The theoretical analysis has been validated through simulation and experimental results.

scholarly journals A Carrier-Based Discontinuous PWM Strategy of NPC Three-Level Inverter for Common-Mode Voltage and Switching Loss Reduction

Electronics ◽  
2021 ◽  
Vol 10 (23) ◽  
pp. 3041
Author(s):  
Guozheng Zhang ◽  
Yingjie Su ◽  
Zhanqing Zhou ◽  
Qiang Geng
Keyword(s):  
Pulse Width Modulation ◽  
Control Method ◽  
Balance Control ◽  
Neutral Point ◽  
Switching Loss ◽  
Major Drawback ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Zero Sequence ◽  
Zero Sequence Voltage

For the conventional carrier-based pulse width modulation (CBPWM) strategies of neutral point clamped (NPC) three-level inverters, the higher common-mode voltage (CMV) is a major drawback. However, with CMV suppression strategies, the switching loss is relatively high. In order to solve the above issue, a carrier-based discontinuous PWM (DPWM) strategy for NPC three-level inverter is proposed in this paper. Firstly, the reference voltage is modified by the twice injection of zero-sequence voltage. Switching states of the three-phase are clamped alternatively to reduce both the CMV and the switching loss. Secondly, the carriers are also modified by the phase opposite disposition of the upper and lower carriers. The extra switching at the border of two adjacent regions in the space vector diagram is reduced. Meanwhile, a neutral-point voltage (NPV) control method is also presented. The duty cycle of the switching state that affects the NPV is adjusted to obtain the balance control of the NPV. Still, the switching sequence in each carrier period remains the same. Finally, the feasibility and effectiveness of the proposed DPWM strategy are tested on a rapid control prototype platform based on RT-Lab.

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