A Bragg grating optically gain-clamped EDFA with adjustable gain, low noise figure and low multipath interference

This paper presents the design of a 60[Formula: see text]GHz-band LNA intended for the 63.72–65.88[Formula: see text]GHz frequency range (channel-4 of the 60[Formula: see text]GHz band). The LNA is designed in a 65-nm CMOS technology and the design methodology is based on a constant-current-density biasing scheme. Prior to designing the LNA, a detailed investigation into the transistor and passives performances at millimeter-wave (MMW) frequencies is carried out. It is shown that biasing the transistors for an optimum noise figure performance does not degrade their power gain significantly. Furthermore, three potential inductive transmission line candidates, based on coplanar waveguide (CPW) and microstrip line (MSL) structures, have been considered to realize the MMW interconnects. Electromagnetic (EM) simulations have been performed to design and compare the performances of these inductive lines. It is shown that the inductive quality factor of a CPW-based inductive transmission line ([Formula: see text] is more than 3.4 times higher than its MSL counterpart @ 65[Formula: see text]GHz. A CPW structure, with an optimized ground-equalizing metal strip density to achieve the highest inductive quality factor, is therefore a preferred choice for the design of MMW interconnects, compared to an MSL. The LNA achieves a measured forward gain of [Formula: see text][Formula: see text]dB with good input and output impedance matching of better than [Formula: see text][Formula: see text]dB in the desired frequency range. Covering a chip area of 1256[Formula: see text][Formula: see text]m[Formula: see text]m including the pads, the LNA dissipates a power of only 16.2[Formula: see text]mW.

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A compact low-noise frontend for interleaved Rx/Tx arrays at K-/Ka-Band

International Journal of Microwave and Wireless Technologies ◽

10.1017/s1759078721000404 ◽

2021 ◽

pp. 1-7

Author(s):

Anton Sieganschin ◽

Thomas Jaschke ◽

Arne F. Jacob

Keyword(s):

Insertion Loss ◽

Printed Circuit Board ◽

Noise Figure ◽

Low Noise ◽

Single Band ◽

Circuit Board ◽

Dual Band ◽

Ka Band ◽

Compression Properties ◽

The Individual

Abstract This contribution deals with a frontend for interleaved receive (Rx)-/transmit (Tx)-integrated phased arrays at K-/Ka-band. The circuit is realized in printed circuit board technology and feeds dual-band Rx/Tx- and single-band Tx-antenna elements. The dual-band element feed is composed of a substrate-integrated waveguide (SIW) diplexer with low insertion loss, a low-noise amplifier (LNA), a bandpass filter, and several passive transitions. The compression properties of the LNA are identified through two-tone measurements. The results dictate the maximum allowable output power of the power amplifier. The single band feed consists of a SIW with several transitions. Simulation and measurement results of the individual components are presented. The frontend is assembled and measured. It exhibits an Rx noise figure of 2 dB, a Tx insertion loss of ~ 2.9 dB, and an Rx/Tx-isolation of 70 dB. The setup represents the unit cell of a full array and thus complies with the required half-wave spacing at both Rx and Tx.

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Measurement of a 270 GHz Low Noise Amplifier With 7.5 dB Noise Figure

IEEE Microwave and Wireless Components Letters ◽

10.1109/lmwc.2007.899324 ◽

2007 ◽

Vol 17 (7) ◽

pp. 546-548 ◽

Cited By ~ 23

Author(s):

T. Gaier ◽

L. Samoska ◽

A. Fung ◽

W. R. Deal ◽

V. Radisic ◽

...

Keyword(s):

Noise Figure ◽

Low Noise ◽

Low Noise Amplifier ◽

Noise Amplifier

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A 5.7GHz low noise figure ultra high gain CMOS LNA with inter stage technique

IEICE Electronics Express ◽

10.1587/elex.7.1686 ◽

2010 ◽

Vol 7 (23) ◽

pp. 1686-1693 ◽

Cited By ~ 6

Author(s):

Ehsan Kargaran ◽

Hojat Khosrowjerdi ◽

Karim Ghaffarzadegan ◽

Hooman Nabovati

Keyword(s):

Noise Figure ◽

High Gain ◽

Low Noise ◽

Cmos Lna

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Active Balun with Center-Tapped Inductor and Double-Balanced Gilbert Mixer for GNSS Applications

Electronics ◽

10.3390/electronics10111351 ◽

2021 ◽

Vol 10 (11) ◽

pp. 1351

Author(s):

Daniel Pietron ◽

Tomasz Borejko ◽

Witold Adam Pleskacz

Keyword(s):

Phase Shift ◽

Noise Figure ◽

Low Noise ◽

Global Navigation Satellite Systems ◽

Cmos Process ◽

Differential Signal ◽

Satellite Systems ◽

Active Balun ◽

Noise Amplifier ◽

Global Navigation Satellite

A new 1.575 GHz active balun with a classic double-balanced Gilbert mixer for global navigation satellite systems is proposed herein. A simple, low-noise amplifier architecture is used with a center-tapped inductor to generate a differential signal equal in amplitude and shifted in phase by 180°. The main advantage of the proposed circuit is that the phase shift between the outputs is always equal to 180°, with an accuracy of ±5°, and the gain difference between the balun outputs does not change by more than 1.5 dB. This phase shift and gain difference between the outputs are also preserved for all process corners, as well as temperature and voltage supply variations. In the balun design, a band calibration system based on a switchable capacitor bank is proposed. The balun and mixer were designed with a 110 nm CMOS process, consuming only a 2.24 mA current from a 1.5 V supply. The measured noise figure and conversion gain of the balun and mixer were, respectively, NF = 7.7 dB and GC = 25.8 dB in the band of interest.

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A 60 GHz fully differential LNA in 90 nm CMOS technology

International Journal of Microwave and Wireless Technologies ◽

10.1017/s1759078713000949 ◽

2013 ◽

Vol 6 (2) ◽

pp. 109-113 ◽

Cited By ~ 2

Author(s):

Andrea Malignaggi ◽

Amin Hamidian ◽

Georg Boeck

Keyword(s):

Power Consumption ◽

Low Power ◽

Transmission Lines ◽

Noise Figure ◽

Design Procedure ◽

Cmos Technology ◽

High Gain ◽

Low Noise ◽

60 Ghz ◽

Fully Differential

The present paper presents a fully differential 60 GHz four stages low-noise amplifier for wireless applications. The amplifier has been optimized for low-noise, high-gain, and low-power consumption, and implemented in a 90 nm low-power CMOS technology. Matching and common-mode rejection networks have been realized using shielded coplanar transmission lines. The amplifier achieves a peak small-signal gain of 21.3 dB and an average noise figure of 5.4 dB along with power consumption of 30 mW and occupying only 0.38 mm2pads included. The detailed design procedure and the achieved measurement results are presented in this work.

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Design of 3.1-10.6GHz CMOS LNA Based on Input Matching Technique of Common-Gate Topology

Applied Mechanics and Materials ◽

10.4028/www.scientific.net/amm.479-480.1014 ◽

2013 ◽

Vol 479-480 ◽

pp. 1014-1017

Author(s):

Yi Cheng Chang ◽

Meng Ting Hsu ◽

Yu Chang Hsieh

Keyword(s):

Noise Figure ◽

Supply Voltage ◽

Average Power ◽

Wide Band ◽

Low Noise ◽

Input Matching ◽

Common Gate ◽

Cmos Lna ◽

Noise Amplifier ◽

Is Design

In this study, three stage ultra-wide-band CMOS low-noise amplifier (LNA) is presented. The UWB LNA is design in 0.18μm TSMC CMOS technique. The LNA input and output return loss are both less than-10dB, and achieved 10dB of average power gain, the minimum noise figure is 6.55dB, IIP3 is about-9.5dBm. It consumes 11mW from a 1.0-V supply voltage.

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