A Process Scalable Architecture for Low Noise Figure Sub-sampling Mixer-First RF Front-End

Author(s):  
Rakesh Rena ◽  
Suraj Kumar Verma ◽  
Vijaya Sankara Rao Pasupureddi
Sensors ◽  
2020 ◽  
Vol 20 (24) ◽  
pp. 7070
Author(s):  
Eduil Nascimento Junior ◽  
Guilherme Theis ◽  
Edson Leonardo dos Santos ◽  
André Augusto Mariano ◽  
Glauber Brante ◽  
...  

Energy-efficiency is crucial for modern radio-frequency (RF) receivers dedicated to Internet of Things applications. Energy-efficiency enhancements could be achieved by lowering the power consumption of integrated circuits, using antenna diversity or even with an association of both strategies. This paper compares two wideband RF front-end architectures, based on conventional low-noise amplifiers (LNA) and low-noise transconductance amplifiers (LNTA) with N-path filters, operating with three transmission schemes: single antenna, antenna selection and singular value decomposition beamforming. Our results show that the energy-efficiency behavior varies depending on the required communication link conditions, distance between nodes and metrics from the front-end receivers. For short-range scenarios, LNA presents the best performance in terms of energy-efficiency mainly due to its very low power consumption. With the increasing of the communication distance, the very low noise figure provided by N-path LNTA-based architectures outperforms the power consumption issue, yielding higher energy-efficiency for all transmission schemes. In addition, the selected front-end architecture depends on the number of active antennas at the receiver. Hence, we can observe that low noise figure is more important with a few active antennas at the receiver, while low power consumption becomes more important when the number of active RF chains at the receiver increases.


2018 ◽  
Vol 28 (01) ◽  
pp. 1950010 ◽  
Author(s):  
Hyouk-Kyu Cha

This work presents a low-noise, low-power receiver RF front-end integrated circuit (IC) for 402–405[Formula: see text]MHz medical implant communications service (MICS) band applications using 0.18-[Formula: see text]m CMOS process. The proposed front-end employs an AC-coupled current mirroring amplifier in between the low-noise current-reuse transconductor amplifier and a single-balanced IQ mixer for improved gain and noise performance in comparison to previous works. The designed front-end IC achieves a simulated performance of 36.5[Formula: see text]dB conversion gain, 1.85[Formula: see text]dB noise figure, and IIP3 of [Formula: see text][Formula: see text]dBm while consuming 440[Formula: see text][Formula: see text]W from 1-V voltage supply. The consumed core layout area, including I/Q LO generation and current bias circuits, is only 0.29[Formula: see text]mm2.


Author(s):  
Mantas Sakalas ◽  
Niko Joram ◽  
Frank Ellinger

Abstract This study presents an ultra-wideband receiver front-end, designed for a reconfigurable frequency modulated continuous wave radar in a 130 nm SiGe BiCMOS technology. A variety of innovative circuit components and design techniques were employed to achieve the ultra-wide bandwidth, low noise figure (NF), good linearity, and circuit ruggedness to high input power levels. The designed front-end is capable of achieving 1.5–40 GHz bandwidth, 30 dB conversion gain, a double sideband NF of 6–10.7 dB, input return loss better than 7.5 dB and an input referred 1 dB compression point of −23 dBm. The front-end withstands continuous wave power levels of at least 25 and 20 dBm at low band and high band inputs respectively. At 3 V supply voltage, the DC power consumption amounts to 302 mW when the low band is active and 352 mW for the high band case, whereas the total IC size is $3.08\, {\rm nm{^2}}$ .


2020 ◽  
Vol 2020 (1) ◽  
pp. 000125-000130
Author(s):  
Leo Hu ◽  
Sze Pei Lim

Abstract With the leap into the 5G era, the demand for improvements in the performance of mobile phones is on the rise. This is also true for the quantity of radio frequency (RF) front-end integrated circuits (ICs), especially for RF switches and low noise amplifiers (LNA). It is well-known that improvements in performance depend on the combination of new design, package technology, and choice of materials. Ultra-low residue (ULR) flux is an innovative, truly no-clean, flip-chip bonding material. By using ULR flux, the typical water-wash cleaning process can be removed and, in some instances, package reliability can be improved as well. This simplified assembly process will help to reduce total packaging costs. This paper will discuss the application of ULR fluxes on land grid arrays (LGAs) and quad-flat no-leads/dual-flat no-leads (QFN/DFN) packages for RF front-end ICs, as well as the reflow process. The solder joint strength and reliability study will be shared as well.


2016 ◽  
Vol 2016 (CICMT) ◽  
pp. 000207-000210
Author(s):  
Martin Oppermann ◽  
Felix Thurow ◽  
Ralf Rieger

Abstract Next generation of RF sensor modules, mainly for airborne applications, will cover a variety of multifunction in terms of different operating modes, e.g. Radar, EW and Communications / Datalinks. The operating frequencies will cover a bandwidth of > 10 GHz and for realisation of modern Active Electronically Steered Antennas (AESA) the Transmit/Receive (T/R) modules have to match with challenging geometry demands, and RF requirements, like switching and filtering between different operational frequencies in transmit and receive mode. New GaN technology based MMICs, e.g. LNA, HPA are in development and multifunctional components (MFC MMICs) cover more than one RF function in one chip. Different front end demonstrators will be presented, based on multilayer ceramic (LTCC) and RF-PCB and associated assembly technologies, like chip&wire and SMD reflow soldering. These TRM front ends include a Low Noise Amplifier with an integrated Switch (LNA/SW) and for characterisation the measured Noise Figure (NF), a key characteristic for receive performance, will be compared. The need for high integration on module level is obvious and therefore specific demands for low loss ceramic and PCB based modules, packages and housings exist.


Author(s):  
Tran Van Hoi ◽  
Ngo Thi Lanh ◽  
Nguyen Xuan Truong ◽  
Nguyen Huu Duc ◽  
Bach Gia Duong

<p>This paper focuses on the design and implementation of a front-end for a Vinasat satellite receiver with auto-searching mechanism and auto-tracking satellite. The front-end consists of a C-band low-noise block down-converter and a L-band receiver. The receiver is designed to meet the requirements about wide-band, high sensitivity, large dynamic range, low noise figure. To reduce noise figure and increase bandwidth, the C-band low-noise amplifier is designed using T-type of matching network with negative feedback and the L-band LNA is designed using cascoded techniques. The local oscillator uses a voltage controlled oscillator combine phase locked loop to reduce the phase noise and select channels. The front-end has successfully been designed and fabricated with parameters: Input frequency is C-band; sensitivity is greater than -130 dBm for C-band receiver and is greater than -110dBm for L-band receiver; output signals are AM/FM demodulation, I/Q demodulation, baseband signals.</p>


Electronics ◽  
2020 ◽  
Vol 9 (9) ◽  
pp. 1369
Author(s):  
Dongquan Huo ◽  
Luhong Mao ◽  
Liji Wu ◽  
Xiangmin Zhang

Direct conversion receiver (DCR) architecture is a promising candidate in the radio frequency (RF) front end because of its low power consumption, low cost and ease of integration. However, flicker noise and direct current (DC) offset are large issues. Owing to the local oscillator (LO) frequency, which is half of the RF frequency, and the absence of a DC bias current that introduces no flicker noise, the subharmonic passive mixer (SHPM) core topology front end overcomes the shortcoming effectively. When more and more receivers (RX) and transmitters (TX) are integrated into one chip, the linearity of the receiver front end becomes a very important performer that handles the TX and RX feedthrough. Another reason for the requirement of good linearity is the massive electromagnetic interference that exists in the atmosphere. This paper presents a linearity-improved RF front end with a feedforward body bias (FBB) subharmonic mixer core topology that satisfies modern RF front end demands. A novel complementary derivative superposition (DS) method is presented in low noise amplifier (LNA) design to cancel both the third- and second-order nonlinearities. To the best knowledge of the authors, this is the first time FBB technology is used in the SHPM core to improve linearity. A Volterra series is introduced to provide an analytical formula for the FBB of the SHPM core. The design was fabricated in a 0.13 μm complementary metal oxide semiconductor (CMOS) process with a chip area of 750 μm × 1270 μm. At a 2.4 GHz working frequency, the measurement result shows a conversion gain of 36 dB, double side band (DSB) noise figure (NF) of 6.8 dB, third-order intermodulation intercept point (IIP3) of 2 dBm, LO–RF isolation of 90 dB and 0.8 mW DC offset with 14.4 mW power consumption at 1.2 V supply voltage. These results exhibit better LO–RF feedthrough and DC offset, good gain and NF, moderate IIP3 and the highest figure of merit compared to the state-of-the-art publications.


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