Fully Integrated High-Voltage Front-End Interface for Ultrasonic Sensing Applications

Author(s):  
Robert Chebli ◽  
Mohamad Sawan
2021 ◽  
Vol 11 (2) ◽  
pp. 22
Author(s):  
Umberto Ferlito ◽  
Alfio Dario Grasso ◽  
Michele Vaiana ◽  
Giuseppe Bruno

Charge-Based Capacitance Measurement (CBCM) technique is a simple but effective technique for measuring capacitance values down to the attofarad level. However, when adopted for fully on-chip implementation, this technique suffers output offset caused by mismatches and process variations. This paper introduces a novel method that compensates the offset of a fully integrated differential CBCM electronic front-end. After a detailed theoretical analysis of the differential CBCM topology, we present and discuss a modified architecture that compensates mismatches and increases robustness against mismatches and process variations. The proposed circuit has been simulated using a standard 130-nm technology and shows a sensitivity of 1.3 mV/aF and a 20× reduction of the standard deviation of the differential output voltage as compared to the traditional solution.


Author(s):  
Raúl E Jiménez ◽  
José P Montoya ◽  
Rodrigo Acuna Herrera

This paper proposes a highly simplified optical voltage sensor by using a piezoelectric bimorph and a Fiber Bragg Grating (FBG) that can be used for high voltage applications with a relatively good accuracy and stability. In this work the theoretical framework for the whole opto-mechanical operation of the optical sensor is detailed and compared to experimental results. In the analysis, a correction term to the electric field is derived to account for the linear strain distribution across the piezoelectric layer improving the designing equations and giving more criteria for future developments. Finally, some experimental results from a laboratory scale optical-based high voltage sensing setup are discussed, and shown to be in excellent agreement with theoretical expected behavior for different voltage magnitudes.


2007 ◽  
Vol 42 (6) ◽  
pp. 1310-1317 ◽  
Author(s):  
Massimo Brandolini ◽  
Marco Sosio ◽  
Francesco Svelto

2011 ◽  
Vol 3 (2) ◽  
pp. 139-145 ◽  
Author(s):  
Srdjan Glisic ◽  
J. Christoph Scheytt ◽  
Yaoming Sun ◽  
Frank Herzel ◽  
Ruoyu Wang ◽  
...  

A fully integrated transmitter (TX) and receiver (RX) front-end chipset, produced in 0.25 µm SiGe:C bipolar and complementary metal oxide semiconductor (BiCMOS) technology, is presented. The front-end is intended for high-speed wireless communication in the unlicensed ISM band of 9 GHz around 60 GHz. The TXand RX features a modified heterodyne topology with a sliding intermediate frequency. The TX features a 12 GHz in-phase and quadrature (I/Q) mixer, an intermediate frequency (IF) amplifier, a phase-locked loop, a 60 GHz mixer, an image-rejection filter, and a power amplifier. The RX features a low-noise amplifier (LNA), a 60 GHz mixer, a phase-locked loop (PLL), and an IF demodulator. The measured 1-dB compression point at the TX output is 12.6 dBm and the saturated power is 16.2 dBm. The LNA has measured noise figure of 6.5 dB at 60 GHz. Error-free data transmission with a 16 quadrature amplitude modulation (QAM) orthogonal frequency-division multiplexing (OFDM) signal and data rate of 3.6 Gbit/s (without coding 4.8 Gbit/s) over 15 m was demonstrated. This is the best reported result regarding both the data rate and transmission distance in SiGe and CMOS without beamforming.


1998 ◽  
Vol 45 (4) ◽  
pp. 2272-2278 ◽  
Author(s):  
J. Vandenbussche ◽  
F. Leyn ◽  
G. Van der Plas ◽  
G. Gielen ◽  
W. Sansen

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