scholarly journals An Automatic Offset Calibration Method for Differential Charge-Based Capacitance Measurement

2021 ◽  
Vol 11 (2) ◽  
pp. 22
Author(s):  
Umberto Ferlito ◽  
Alfio Dario Grasso ◽  
Michele Vaiana ◽  
Giuseppe Bruno

Charge-Based Capacitance Measurement (CBCM) technique is a simple but effective technique for measuring capacitance values down to the attofarad level. However, when adopted for fully on-chip implementation, this technique suffers output offset caused by mismatches and process variations. This paper introduces a novel method that compensates the offset of a fully integrated differential CBCM electronic front-end. After a detailed theoretical analysis of the differential CBCM topology, we present and discuss a modified architecture that compensates mismatches and increases robustness against mismatches and process variations. The proposed circuit has been simulated using a standard 130-nm technology and shows a sensitivity of 1.3 mV/aF and a 20× reduction of the standard deviation of the differential output voltage as compared to the traditional solution.

2012 ◽  
Vol 1427 ◽  
Author(s):  
Masayuki Sohgawa ◽  
Hokuto Yokoyama ◽  
Takeshi Kanashima ◽  
Masanori Okuyama ◽  
Haruo Noma

ABSTRACTWe have developed the tactile sensor using the microcantilevers with strain gauge film which can detect normal and shear forces simultaneously. In this work, the tactile sensor and the IC amplifier have been integrated heterogeneously to shorten the wire length by chip-on-chip stacking and reduce the noise in the output voltage. Standard deviation of the noise can be reduced from 27.6 mV to 3.3 mV by heterogeneous integration of the tactile sensor and the IC amplifier using Au wire bonding. By this heterogeneous integration, the device size and wiring numbers can be reduced, and installation of more sensors is allowed on fingertips of the robot. Moreover, through-silicon-via (TSV) holes were fabricated to mount an IC amplifier on the backside of the sensor chip, instead of using Au wires. Although TSV can be fabricated successfully, resistance to sacrificial etching process is problem. As a result, Si3N4 used instead of SiO2 has improved insulation between TSVs.


Author(s):  
Po-Chih Wang ◽  
Chia-Jun Chang ◽  
Wei-Ming Chiu ◽  
Pei-Ju Chiu ◽  
Chun-Cheng Wang ◽  
...  

Author(s):  
Jorge Pérez Bailón ◽  
Belén Calvo ◽  
Nicolás Medrano

This paper presents a fully-integrated low-power 0.18 µm CMOS Low-Dropout (LDO) regulator for battery operated portable devices. It provides an accurate 1.2 V output voltage from 3.3 V to 1.3 V input voltages up with only 5.9 µA quiescent current, including an all-MOS 0.4 V reference voltage.


Author(s):  
Fabio Aquilino ◽  
Francesco G. Della Corte ◽  
Letizia Fragomeni ◽  
Massimo Merenda ◽  
Fabio Zito

2021 ◽  
Vol 11 (2) ◽  
pp. 582
Author(s):  
Zean Bu ◽  
Changku Sun ◽  
Peng Wang ◽  
Hang Dong

Calibration between multiple sensors is a fundamental procedure for data fusion. To address the problems of large errors and tedious operation, we present a novel method to conduct the calibration between light detection and ranging (LiDAR) and camera. We invent a calibration target, which is an arbitrary triangular pyramid with three chessboard patterns on its three planes. The target contains both 3D information and 2D information, which can be utilized to obtain intrinsic parameters of the camera and extrinsic parameters of the system. In the proposed method, the world coordinate system is established through the triangular pyramid. We extract the equations of triangular pyramid planes to find the relative transformation between two sensors. One capture of camera and LiDAR is sufficient for calibration, and errors are reduced by minimizing the distance between points and planes. Furthermore, the accuracy can be increased by more captures. We carried out experiments on simulated data with varying degrees of noise and numbers of frames. Finally, the calibration results were verified by real data through incremental validation and analyzing the root mean square error (RMSE), demonstrating that our calibration method is robust and provides state-of-the-art performance.


Electronics ◽  
2021 ◽  
Vol 10 (1) ◽  
pp. 68
Author(s):  
Woorham Bae ◽  
Sung-Yong Cho ◽  
Deog-Kyoon Jeong

This paper presents a fully integrated Peripheral Component Interconnect (PCI) Express (PCIe) Gen4 physical layer (PHY) transmitter. The prototype chip is fabricated in a 28 nm low-power CMOS process, and the active area of the proposed transmitter is 0.23 mm2. To enable voltage scaling across wide operating rates from 2.5 Gb/s to 16 Gb/s, two on-chip supply regulators are included in the transmitter. At the same time, the regulators maintain the output impedance of the transmitter to meet the return loss specification of the PCIe, by including replica segments of the output driver and reference resistance in the regulator loop. A three-tap finite-impulse-response (FIR) equalization is implemented and, therefore, the transmitter provides more than 9.5 dB equalization which is required in the PCIe specification. At 16 Gb/s, the prototype chip achieves energy efficiency of 1.93 pJ/bit including all the interface, bias, and built-in self-test circuits.


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