Analysis and Design of Output-Capacitor-Free Low-Dropout Regulators With Low Quiescent Current and High Power Supply Rejection

2014 ◽  
Vol 61 (2) ◽  
pp. 625-636 ◽  
Author(s):  
Chenchang Zhan ◽  
Wing-Hung Ki
Keyword(s):  
High Power ◽  
Power Supply ◽  
Low Dropout Regulators ◽  
Analysis And Design ◽  
Quiescent Current ◽  
Output Capacitor ◽  
Supply Rejection

A LOW DROPOUT REGULATOR WITH LOW QUIESCENT CURRENT AND HIGH POWER SUPPLY REJECTION OVER WIDE RANGE OF FREQUENCY FOR SOC

2011 ◽  
Vol 20 (01) ◽  
pp. 1-13 ◽  
Author(s):  
CHENCHANG ZHAN ◽  
WING-HUNG KI
Keyword(s):  
High Power ◽  
Power Supply ◽  
Cmos Process ◽  
High Loop ◽  
Wide Range ◽  
Quiescent Current ◽  
Low Dropout Regulator ◽  
Output Capacitor ◽  
Large Output ◽  
Supply Rejection

A CMOS low quiescent current low dropout regulator (LDR) with high power supply rejection (PSR) and without large output capacitor is proposed for system-on-chip (SoC) power management applications. By cascoding a power NMOS with the PMOS pass transistor, high PSR over a wide frequency range is achieved. The gate-drive of the cascode NMOS is controlled by an auxiliary LDR that draws only 1 μA from a small charge pump, thus helping in reducing the quiescent current. Adaptive biasing is employed for the multi-stage error amplifier of the core LDR to achieve high loop gain hence high PSR at low frequency, low quiescent current at light load and high bandwidth at heavy load. A prototype of the proposed high-PSR LDR is fabricated using a standard 0.35 μm CMOS process, occupying an active area of 0.066 mm2. The lowest supply voltage is 1.6 V and the preset output voltage is 1.2 V. The maximum load current is 10 mA. The measured worst-case PSR at full load without using large output capacitor is -22.7 dB up to 60 MHz. The line and load regulations are 0.25 mV/V and 0.32 mV/mA, respectively.

scholarly journals A Transient-Enhanced Voltage Regulator with Stability and Power-Supply-Rejection Boosting

2019 ◽  
Vol 14 (1) ◽  
Author(s):  
Yue Shi ◽  
Anqi Wang ◽  
Jianwen Cao ◽  
Zekun Zhou
Keyword(s):  
Power Supply ◽  
Low Voltage ◽  
Input Voltage ◽  
Voltage Regulator ◽  
Load Range ◽  
Load Regulation ◽  
The Stability ◽  
Output Capacitor ◽  
Better Than ◽  
Supply Rejection

AbstractA high-stability voltage regulator (VR) is proposed in this paper, which integrates transient enhancement and overcurrent protection (OCP). Taken into consideration the performance and area advantages of low-voltage devices, most control parts of proposed VR are supplied by the regulated output voltage, which forms self-power technique (SPT) with power supply rejection (PSR) boosting. Besides, the stability and transient response are enhanced by dynamic load technique (DLT). An embedded overcurrent feedback loop is also adopted to protect the presented VR from damage under overload situations. The proposed VR is implemented in a standard 350 nm BCD technology, whose results indicate the VR can steadily work with 5.5–30 V input voltage, 0–30 mA load range, and 0.1–3.3 μF output capacitor. A 2.98 μV/V line regulation and a 0.233 mV/mA load regulation are achieved with a 40 mA current limiting. The PSR is better than − 64 dB up to 10 MHz with a 0.1 μF output capacitor.

Analysis and design of a current-mode bandgap reference with high power supply ripple rejection

2017 ◽  
Vol 68 ◽  
pp. 7-13 ◽  
Author(s):  
Lidan Wang ◽  
Chenchang Zhan ◽  
Junyao Tang ◽  
Shuangxing Zhao ◽  
Guigang Cai ◽  
...  
Keyword(s):  
High Power ◽  
Power Supply ◽  
Current Mode ◽  
Bandgap Reference ◽  
Analysis And Design ◽  
A Current
Sign in / Sign up

Export Citation Format

Share Document