A Low-cost High-speed Object Tracking VLSI System Based on Unified Textural and Dynamic Compressive Features

This paper proposes a high-speed low-cost VLSI system capable of on-chip online learning for classifying address-event representation (AER) streams from dynamic vision sensor (DVS) retina chips. The proposed system executes a lightweight statistic algorithm based on simple binary features extracted from AER streams and a Random Ferns classifier to classify these features. The proposed system’s characteristics of multi-level pipelines and parallel processing circuits achieves a high throughput up to 1 spike event per clock cycle for AER data processing. Thanks to the nature of the lightweight algorithm, our hardware system is realized in a low-cost memory-centric paradigm. In addition, the system is capable of on-chip online learning to flexibly adapt to different in-situ application scenarios. The extra overheads for on-chip learning in terms of time and resource consumption are quite low, as the training procedure of the Random Ferns is quite simple, requiring few auxiliary learning circuits. An FPGA prototype of the proposed VLSI system was implemented with 9.5~96.7% memory consumption and <11% computational and logic resources on a Xilinx Zynq-7045 chip platform. It was running at a clock frequency of 100 MHz and achieved a peak processing throughput up to 100 Meps (Mega events per second), with an estimated power consumption of 690 mW leading to a high energy efficiency of 145 Meps/W or 145 event/μJ. We tested the prototype system on MNIST-DVS, Poker-DVS, and Posture-DVS datasets, and obtained classification accuracies of 77.9%, 99.4% and 99.3%, respectively. Compared to prior works, our VLSI system achieves higher processing speeds, higher computing efficiency, comparable accuracy, and lower resource costs.

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Development and production experience of the multilayer curtain-coated linerboard of Ji’an PM No. 3,

TAPPI Journal ◽

10.32964/tj13.2.17 ◽

2014 ◽

Vol 13 (2) ◽

pp. 17-25

Author(s):

JUNMING SHU ◽

ARTHAS YANG ◽

PEKKA SALMINEN ◽

HENRI VAITTINEN

Keyword(s):

Titanium Dioxide ◽

High Speed ◽

Food Packaging ◽

Production Efficiency ◽

Positive Impact ◽

Low Cost ◽

Board Structure ◽

Flexographic Printing ◽

Curtain Coating ◽

Coating Formulations

The Ji’an PM No. 3 is the first linerboard machine in China to use multilayer curtain coating technology. Since successful startup at the end of 2011, further development has been carried out to optimize running conditions, coating formulations, and the base paper to provide a product with satisfactory quality and lower cost to manufacture. The key challenges include designing the base board structure for the desired mechanical strength, designing the surface properties for subsequent coating operations, optimizing the high-speed running of the curtain coater to enhance production efficiency, minimizing the amount of titanium dioxide in the coating color, and balancing the coated board properties to make them suitable for both offset and flexographic printing. The pilot and mill scale results show that curtain coating has a major positive impact on brightness, while smoothness is improved mainly by the blade coating and calendering conditions. Optimization of base board properties and the blade + curtain + blade concept has resulted in the successful use of 100% recycled fiber to produce base board. The optical, mechanical, and printability properties of the final coated board meet market requirements for both offset and flexographic printing. Machine runnability is excellent at the current speed of 1000 m/min, and titanium dioxide has been eliminated in the coating formulations without affecting the coating coverage. A significant improvement in the total cost of coated white liner production has been achieved, compared to the conventional concept of using virgin fiber in the top ply. Future development will focus on combining low cost with further quality improvements to make linerboard suitable for a wider range of end-use applications, including frozen-food packaging and folding boxboard.

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Low-Cost High-Speed Techniques for Real-Time Simulation of Power Electronic Systems

10.21236/ada485330 ◽

2007 ◽

Author(s):

R. E. Crosbie ◽

J. J. Zenor ◽

R. Bednar ◽

D. Word ◽

N. G. Hingorani

Keyword(s):

Real Time ◽

High Speed ◽

Low Cost ◽

Electronic Systems ◽

Power Electronic ◽

Real Time Simulation ◽

Time Simulation

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Combining Ultrasonic Signals And Multi-Colored Images To Perform Object Tracking And Recognition In Low-Cost Robotic Platforms

10.21528/cbic2011-22.4 ◽

2016 ◽

Author(s):

Danilo H. F. Menezes ◽

Thiago D. Mendonca ◽

Wolney M. Neto ◽

Hendrik T. Macedo ◽

Leonardo N. Matos

Keyword(s):

Object Tracking ◽

Low Cost ◽

Ultrasonic Signals ◽

Robotic Platforms ◽

Tracking And Recognition

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High-speed electro-optic switch using buried electrode structure in polymer Mach–Zehnder waveguide

Modern Physics Letters B ◽

10.1142/s0217984916500639 ◽

2016 ◽

Vol 30 (06) ◽

pp. 1650063 ◽

Cited By ~ 1

Author(s):

Jingwen Sun ◽

Jian Sun ◽

Yunji Yi ◽

Lucheng Qv ◽

Shiqi Sun ◽

...

Keyword(s):

Insertion Loss ◽

Rise Time ◽

High Speed ◽

Low Cost ◽

Characteristic Parameters ◽

Electrode Structure ◽

Processing Cost ◽

Electro Optic ◽

Disperse Red 1 ◽

Excellent Photostability

A low-cost and high-speed electro-optic (EO) switch using the guest–host EO material Disperse Red 1/Polymethyl Methacrylate (DR1/PMMA) was designed and fabricated. The DR1/PMMA material presented a low processing cost, an excellent photostability and a large EO coefficient of 13.1 pm/V. To improve the performance of the switch, the in-plane buried electrode structure was introduced in the polymer Mach–Zehnder waveguide to improve the poling and modulating efficiency. The characteristic parameters of the waveguide and the electrodes were carefully designed and the fabrication process was strictly controlled. Under 1550 nm, the insertion loss of the device was 12.7 dB. The measured switching rise time and fall time of the switch were 50.00 ns and 54.29 ns, respectively.

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High speed long-term visual object tracking algorithm for real robot systems

Neurocomputing ◽

10.1016/j.neucom.2020.12.113 ◽

2021 ◽

Vol 434 ◽

pp. 268-284

Author(s):

Muxi Jiang ◽

Rui Li ◽

Qisheng Liu ◽

Yingjing Shi ◽

Esteban Tlelo-Cuautle

Keyword(s):

Object Tracking ◽

High Speed ◽

Tracking Algorithm ◽

Visual Object ◽

Visual Object Tracking ◽

Robot Systems ◽

Real Robot

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Towards a Glass New World: The Role of Ion-Exchange in Modern Technology

Applied Sciences ◽

10.3390/app11104610 ◽

2021 ◽

Vol 11 (10) ◽

pp. 4610

Author(s):

Simone Berneschi ◽

Giancarlo C. Righini ◽

Stefano Pelli

Keyword(s):

Ion Exchange ◽

Communication Networks ◽

High Speed ◽

High Performance ◽

Low Cost ◽

Modern Technology ◽

Historical Background ◽

Wide Range ◽

Happy Marriage

Glasses, in their different forms and compositions, have special properties that are not found in other materials. The combination of transparency and hardness at room temperature, combined with a suitable mechanical strength and excellent chemical durability, makes this material indispensable for many applications in different technological fields (as, for instance, the optical fibres which constitute the physical carrier for high-speed communication networks as well as the transducer for a wide range of high-performance sensors). For its part, ion-exchange from molten salts is a well-established, low-cost technology capable of modifying the chemical-physical properties of glass. The synergy between ion-exchange and glass has always been a happy marriage, from its ancient historical background for the realisation of wonderful artefacts, to the discovery of novel and fascinating solutions for modern technology (e.g., integrated optics). Getting inspiration from some hot topics related to the application context of this technique, the goal of this critical review is to show how ion-exchange in glass, far from being an obsolete process, can still have an important impact in everyday life, both at a merely commercial level as well as at that of frontier research.

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In-Plane Monolithic Integration of Scaled III-V Photonic Devices

Applied Sciences ◽

10.3390/app11041887 ◽

2021 ◽

Vol 11 (4) ◽

pp. 1887

Author(s):

Markus Scherrer ◽

Noelia Vico Triviño ◽

Svenja Mauthe ◽

Preksha Tiwari ◽

Heinz Schmid ◽

...

Keyword(s):

Integrated Circuits ◽

High Speed ◽

Low Cost ◽

Photonic Devices ◽

Monolithic Integration ◽

Light Emitters ◽

Fully Integrated ◽

Large Lattice ◽

Hybrid Iii ◽

Gain Material

It is a long-standing goal to leverage silicon photonics through the combination of a low-cost advanced silicon platform with III-V-based active gain material. The monolithic integration of the III-V material is ultimately desirable for scalable integrated circuits but inherently challenging due to the large lattice and thermal mismatch with Si. Here, we briefly review different approaches to monolithic III-V integration while focusing on discussing the results achieved using an integration technique called template-assisted selective epitaxy (TASE), which provides some unique opportunities compared to existing state-of-the-art approaches. This method relies on the selective replacement of a prepatterned silicon structure with III-V material and thereby achieves the self-aligned in-plane monolithic integration of III-Vs on silicon. In our group, we have realized several embodiments of TASE for different applications; here, we will focus specifically on in-plane integrated photonic structures due to the ease with which these can be coupled to SOI waveguides and the inherent in-plane doping orientation, which is beneficial to waveguide-coupled architectures. In particular, we will discuss light emitters based on hybrid III-V/Si photonic crystal structures and high-speed InGaAs detectors, both covering the entire telecom wavelength spectral range. This opens a new path towards the realization of fully integrated, densely packed, and scalable photonic integrated circuits.

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