Improved Mobility Extraction Methodology for Reconfigurable Transistors Considering Resistive Components and Effective Drain Bias

2021 ◽  
pp. 1-4
Author(s):  
Somesh Mane ◽  
Sandeep Semwal ◽  
Abhinav Kranti
Keyword(s):  
Drain Bias

Drain bias dependent bias temperature stress instability in a-Si:H TFT

2009 ◽  
Vol 53 (2) ◽  
pp. 225-233 ◽  
Author(s):  
Z. Tang ◽  
M.S. Park ◽  
S.H. Jin ◽  
C.R. Wie
Keyword(s):  
Temperature Stress ◽  
Drain Bias ◽  
Bias Temperature Stress

Gate-Length and Drain-Bias Dependence of Band-to-Band Tunneling-Induced Drain Leakage in Irradiated Fully Depleted SOI Devices

2008 ◽  
Vol 55 (6) ◽  
pp. 3259-3264 ◽  
Author(s):  
Farah E. Mamouni ◽  
Sriram K. Dixit ◽  
Ronald D. Schrimpf ◽  
Philippe C. Adell ◽  
Ivan S. Esqueda ◽  
...  
Keyword(s):  
Gate Length ◽  
Fully Depleted ◽  
Band To Band Tunneling ◽  
Drain Bias ◽  
Soi Devices

Reliability Tradeoffs and Scaling Issues of Read Drain Bias in nor Flash Memory

2009 ◽  
Vol 56 (9) ◽  
pp. 2045-2051 ◽  
Author(s):  
Yung-Huei Lee ◽  
William McMahon ◽  
Yin-Lung Ryan Lu ◽  
Zeev Freidin
Keyword(s):  
Flash Memory ◽  
Drain Bias ◽  
Nor Flash

scholarly journals New single-electron pump regime with highly controllable plateaus

2021 ◽  
Author(s):  
Hume Howe ◽  
Mark Blumenthal ◽  
Harvey Beere ◽  
Thomas Mitchell ◽  
David Ritchie ◽  
...  
Keyword(s):  
Single Electron ◽  
Electronic Systems ◽  
Electrostatic Model ◽  
Quantum Tunnelling ◽  
Point Potential ◽  
Gate Potential ◽  
Drain Bias ◽  
Pump Mechanism ◽  
Dimensional Electron Gas ◽  
Ultimate Limit

Abstract Future quantum based electronic systems will demand robust and highly accurate on-demand sources of current. Generating quantised current has immediate implications for quantum computing, quantum metrology, and electron interferometry. The ultimate limit of quantised current sources is a highly controllable device that manipulates individual electrons. We present a new single-electron pump mechanism, realised in a GaAs two-dimensional electron gas, where electrons are pumped through a one-dimensional split-gate confinement potential rather than more conventionally over a finger-gate potential. This new mechanism yields a new long pumping regime with quantised plateaus that are over two orders of magnitude longer than conventional pumps, and are extremely stable with respect to the applied voltages on the gates. The long plateaus are achieved via the combination of a saddle-point potential profile and enhanced quantum tunnelling, wherein the potential barrier height and shape are modified by the application of a source-drain bias. This new pumping regime cannot be explained by the simple geometrical electrostatic models or back-tunnelling theory that are used to describe conventional single-electron pumps, and we use a simple electrostatic model applied to split-gate confined pumps to explain some of the source-drain bias dependence.

5A 1300V Trenched and Implanted 4H-SiC Vertical JFET

2012 ◽  
Vol 229-231 ◽  
pp. 824-827 ◽  
Author(s):  
Gang Chen ◽  
Xiao Feng Song ◽  
Song Bai ◽  
Li Li ◽  
Yun Li ◽  
...  
Keyword(s):  
Ohmic Contact ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Vertical Channel ◽  
Drain Current ◽  
Gate Bias ◽  
Blocking Voltage ◽  
Drain Bias ◽  
Effect Transistor ◽  
Lift Off

A silicon carbide (SiC) vertical channel junction field effect transistor (VJFET) was fabricated based on in-house SiC epitaxial wafer with lift-off trenched and implanted method. Its blocking voltage exceeds 1300V at gate bias VG = -6V and forward drain current is in excess of 5A at gate bias VG = 3V and drain bias VD = 3V. The SiC VJFET device’s current density is 240A/cm2 at VG= 3V and VD = 3V, with related specific on-resistance 8.9mΩ•cm2. Further analysis reveals that the on-resistance depends greatly on ohmic contact resistance and the bonding spun gold. The specific on-resistance can be further reduced by improving the doping concentration of SiC channel epilayer and the device’s ohmic contact.

Threshold-Voltage Modeling of Double-Gate MOSFETs by Considering Drain Bias

2007 ◽  
Vol 51 (96) ◽  
pp. 275
Author(s):  
Byung-Kil CHOI ◽  
Kyoung-Rok HAN ◽  
Young Min KIM ◽  
Ki-Heung PARK ◽  
Jong-Ho LEE ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Double Gate ◽  
Drain Bias

1200 V / 200 A V-Groove Trench MOSFET Optimized for Low Power Loss and High Reliability

2020 ◽  
Vol 1004 ◽  
pp. 776-782
Author(s):  
Kosuke Uchida ◽  
Toru Hiyoshi ◽  
Yu Saito ◽  
Hiroshi Egusa ◽  
Tatsushi Kaneda ◽  
...  
Keyword(s):  
High Temperature ◽  
Electric Field ◽  
Low Power ◽  
Power Loss ◽  
High Reliability ◽  
Short Circuit ◽  
Guard Ring ◽  
Optimized Design ◽  
Drain Bias ◽  
Bias Condition

1200 V / 200 A V-groove trench MOSFET optimized to achieve low power loss, high oxide reliability under a drain bias condition and high avalanche ruggedness is shown in this paper. We revealed a relationship between the lifetime under a high temperature reverse bias condition and the oxide electric field. In accordance with the results of the test, the 1200 V / 200 A trench MOSFET showed an improvement in the tradeoff between the on-resistance and oxide electric field with the presence of current spreading layers. In order to obtain low on-resistance and high avalanche ruggedness at the same time, buried guard ring structures, which made the blocking voltage of the edge termination area higher than that of the active area, was developed. The fabricated MOSFETs demonstrated a low specific on-resistance of 3.1 mΩ cm2. A predicted lifetime of 200 years under a high temperature drain bias condition of 1200 V was achieved by the optimized design. A short circuit withstand time of 6 μs and a high avalanche energy of 7.8 J/cm2 were shown.

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