Ultra low energy arsenic implant limits on sheet resistance and junction depth

2002 ◽  
Author(s):  
R. Kasnavi ◽  
P.B. Griffin ◽  
J.D. Plummer
Keyword(s):  
Sheet Resistance ◽  
Low Energy ◽  
Junction Depth

Annealing Studies on Low Energy As+ and As2+ Implants

1998 ◽  
Vol 525 ◽  
Author(s):  
Raghu Srinivasa ◽  
Vikas Agarwal ◽  
Jinning Liu ◽  
Daniel F. Downey ◽  
Sanjay Banerjee
Keyword(s):  
Sheet Resistance ◽  
Lower Energy ◽  
Low Energy ◽  
Alternative Technique ◽  
Junction Depth ◽  
Low Concentration ◽  
Enhanced Diffusion ◽  
Lower Temperature

ABSTRACT2 keV to 10 keV arsenic, As+, and arsenic dimer ions, As 2+, were implanted into silicon at a dose of le15 cm-2 and 3e 15 cm-2 at 0° and 7°' tilt angles. For bare wafers, a low concentration of oxygen is required to provide sufficient capping during anneal to minimize out-diffusion. In the presence of oxygen, enhanced diffusion occurs during the anneal, the extent of which is a function of the concentration of oxygen and the temperature of anneal. The oxidation enhanced diffusion (OED) is significant at anneal temperatures above 1050°C. The extent of OED is observed to be more significant for the samples with lower energy As+ implants. An alternative technique for minimizing OED, without much out-diffusion, is the use of higher energy, 5 keV implants through a screen oxide. For identical anneal conditions, 5 keV As+ implants through a 40 Å screen oxide offer junction depth and sheet resistance values equivalent to that of 2 keV implants into bare silicon. As the screen oxide is sufficient to cap the out-diffusion of dopants, a nitrogen ambient or a lower temperature could be employed to get shallower junctions without much degradation in the sheet resistance. Further reduction in junction depths can be achieved by using the As 2+ implants.

Effect of Ge Pre-amorphization on Junction Characteristics for Low Energy B Implants

2000 ◽  
Vol 610 ◽  
Author(s):  
Jinning Liu ◽  
Sandeep Mehta
Keyword(s):  
Sheet Resistance ◽  
Low Energy ◽  
Junction Depth ◽  
Semiconductor Processing ◽  
Rapid Thermal Anneal ◽  
Lower Sheet ◽  
N Source ◽  
Energy Regime ◽  
Spike Anneal ◽  
Lower Sheet Resistance

AbstractThe drive towards developing deep sub-micron CMOS devices places more challenges on semiconductor processing. From the standpoint of doping technology, the challenge is to achieve ultra-shallow p+/n source/drain extension junctions for PMOS. Among the various approaches being pursued to meet this challenge, pre-amorphization was used to curtail channeling of the as-implanted Boron. The effect of pre-amorphization on junction depth and junction sheet resistance in the ultra-low implant energy regime is investigated in this study. Pre-amorphization was achieved with Ge implant. B was implanted at energies of 250eV to 5keV and at a dose of 1×1015cm−2 into crystalline and pre-amorphized wafers. Both spike anneal at 1050°C and furnace anneal at 500°C to 750°C were performed after B implants. In all spike anneal cases, the pre-amorphized wafers exhibit higher sheet resistance and shallower junction depth than crystalline wafers. In all furnace anneal cases, shallower junction depth as well as lower sheet resistance can be achieved with pre-amorphized wafers. Higher pre-amorphization energy induces lower sheet resistance after both furnace and rapid thermal anneal (RTA).

Low energy boron implantation profiles in silicon from junction depth measurements

1971 ◽  
Vol 7 (1-2) ◽  
pp. 7-15 ◽  
Author(s):  
P. Sebillotte ◽  
M. Badanoiu ◽  
V. B. Ndocko ◽  
P. Siffert
Keyword(s):  
Low Energy ◽  
Junction Depth ◽  
Boron Implantation

Electron beam Annealing of Shallow BF2 Implantations

1983 ◽  
Vol 23 ◽  
Author(s):  
C. Jaussaud ◽  
A.M. Cartier ◽  
J. Escaron
Keyword(s):  
Electron Beam ◽  
Sheet Resistance ◽  
Annealing Time ◽  
Junction Depth ◽  
Spreading Resistance ◽  
Annealing Temperatures ◽  
Minimum Value ◽  
Beam System ◽  
Multiple Scan ◽  
Resistance Value

ABSTRACTA multiple scan electron beam system has been used to anneal silicon implanted with BF2 (25 Kev, 1, 2 and 5 × 1015 ions × cm−2 ). The annealing temperatures range from 1000 to 1200° C and the annealing times from 3 to 18 seconds. The curves of sheet resistance as a function of annealing time show a minimum. The increase in sheet resistance at longer annealing times is due to boron outdiffusion. Junction depths have been measured by spreading resistance and are presented. For implanted doses below 2 × 1015 ions × cm−2 boron outdiffusion limits the sheet resistance value at about 100 R Ωand this minimum value corresponds to an increase in junction depths of about 500 Å. For implanted doses of 5 × 1015 ions ×cm−2, 60 Ω sheet resistance can be obtained, but with about 1000 Å increase in junction depth.

Study on the Effect of RTA Ambient to Shallow N+/P Junction Formation using PH3 Plasma Doping

2008 ◽  
Vol 1070 ◽  
Author(s):  
Seung-woo Do ◽  
Byung-Ho Song ◽  
Ho Jung ◽  
Seong-Ho Kong ◽  
Jae-Geun Oh ◽  
...  
Keyword(s):  
Free Surface ◽  
Sheet Resistance ◽  
Gas Flow ◽  
Room Temperature ◽  
Doping Concentration ◽  
Junction Depth ◽  
Surface Doping ◽  
Plasma Doping ◽  
Junction Formation ◽  
Doping Profiles

ABSTRACTPlasma doping (PLAD) process utilizing PH3 plasma to fabricate n-type junction with supplied bias of −1 kV and doping time of 60 sec under the room temperature is presented. The RTA process is performed at 900 °C for 10 sec. A defect-free surface is corroborated by TEM and DXRD analyses, and examined SIMS profiles reveal that shallow n+ junctions are formed with surface doping concentration of 1021atoms/cm3. The junction depth increases in proportion to the O2 gas flow when the N2 flow is fixed during the RTA process, resulting in a decreased sheet resistance. Measured doping profiles and the sheet resistance confirm that the n+ junction depth less than 52 nm and minimum sheet resistance of 313 Ω/□ are feasible.

Electrical Performance and Scalability of Ni-monosilicide towards sub 0.13 μm Technologies

2001 ◽  
Vol 670 ◽  
Author(s):  
Anne Lauwers ◽  
Muriel de Potter ◽  
Richard Lindsay ◽  
An Steegen ◽  
Nico Roelandts ◽  
...  
Keyword(s):  
Sheet Resistance ◽  
Leakage Current ◽  
Reverse Bias ◽  
Active Role ◽  
Active Area ◽  
Electrical Performance ◽  
Junction Depth ◽  
Shallow Junction ◽  
The Relationship ◽  
Thickness Sheet

ABSTRACTThe relationship between silicide thickness, sheet resistance and silicon consumption is experimentally checked for Co-disilicide and Ni-monosilicide. The reverse bias leakage current of shallow Ni-silicided and Co-silicided square diodes is compared for varying junction depth and varying silicide thickness. A lower reverse bias leakage current is obtained for a Ni-silicided shallow junction as compared to its Co-silicided counterpart. This can be attributed to the reduced silicon consumption. The Ti cap does not play an active role during the Ni-silicidation of narrow active area and poly lines. It is shown that a Ni-silicidation process is scalable without Ti cap.

Analysis of low-energy boron implants in silicon

1985 ◽  
Vol 63 (6) ◽  
pp. 890-893 ◽  
Author(s):  
M. Simard-Normandin ◽  
C. Slaby
Keyword(s):  
Sheet Resistance ◽  
Mass Spectroscopy ◽  
Measurement Techniques ◽  
Low Energy ◽  
Resistance Measurement ◽  
Concentration Profiles ◽  
Secondary Ion Mass Spectroscopy ◽  
Sheet Resistance Measurement ◽  
Secondary Ion

Low-energy boron implants in silicon are analyzed using secondary-ion mass spectroscopy and standard junction and sheet-resistance measurement techniques. Implantation of 11B+ is compared with that of [Formula: see text]. The concentration profiles are compared with Linhard–Scharf–Schiott theory and improved range parameters are obtained.

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