Strategies for Improving Reliability of Solder Joints on Power Semiconductor Devices

Author(s):  
Guo-Quan Lu ◽  
Xingsheng Liu ◽  
Sihua Wen ◽  
Jesus Noel Calata ◽  
John G. Bai

There has been a significant research effort on area-array flip-chip solder joint technology in order to reduce package footprint, enhance current handling capability, and improve heat dissipation. However, there is a lingering concern over cyclic fatigue of solder alloys by thermo-mechanical stresses arising from mismatched thermal expansion coefficients of expansion among the various components of the package. In this paper, some strategies taken to improve the reliability of solder joints on power devices in single-device and multi-chip packages are presented. A strategy for improving solder joint reliability by adjusting solder joint geometry, underfilling and utilization of flexible substrates is discussed with emphasis on triple-stacked solder joints that resemble the shape of an hourglass. The hourglass shape relocates the highest inelastic strain away from the weaker interface with the chip to the bulk region of the joint while the underfill provides a load transfer from the joints. Flexible substrates can deform to relieve thermo-mechanical stresses. Thermal cycling data show significant improvements in reliability when these techniques are used. The design, testing, and finite-element analyses of an interconnection structure, termed the Dimple-Array Interconnect (DAI), for improving the solder joint reliability is also presented. In the DAI structure, a solder is used to join arrays of dimples pre-formed on a metal sheet onto the bonding pads of a device. Finite-element thermo-mechanical analyses and thermal cycling data show that the dimple-array solder joints are more fatigue-resistant than the conventional barrel-shaped solder joints in flip-chip IC packages.

Author(s):  
Mohammad Motalab ◽  
Muhannad Mustafa ◽  
Jeffrey C. Suhling ◽  
Jiawei Zhang ◽  
John Evans ◽  
...  

The microstructure, mechanical response, and failure behavior of lead free solder joints in electronic assemblies are constantly evolving when exposed to isothermal aging and/or thermal cycling environments. Traditional finite element based predictions for solder joint reliability during thermal cycling accelerated life testing are based on solder constitutive equations (e.g. Anand viscoplastic model) and failure models (e.g. energy dissipation per cycle model) that do not evolve with material aging. Thus, there will be significant errors in the calculations with lead free SAC alloys that illustrate dramatic aging phenomena. In this research, we have developed a new reliability prediction procedure that utilizes constitutive relations and failure criteria that incorporate aging effects, and then validated the new approach through correlation with thermal cycling accelerated life testing experimental data. As a part of this work, a revised set off Anand viscoplastic stress-strain relations for solder have been developed that included material parameters that evolve with the thermal history of the solder material. The effects of aging on the nine Anand model parameters have been determined as a function of aging temperature and aging time, and the revised Anand constitutive equations with evolving material parameters have been implemented in commercial finite element codes. In addition, new aging aware failure criteria have been developed based on fatigue data for lead free solder uniaxial specimens that were aged at elevated temperature for various durations prior to mechanical cycling. Using the measured fatigue data, mathematical expressions have been developed for the evolution of the solder fatigue failure criterion constants with aging, both for Coffin-Manson (strain-based) and Morrow-Darveaux (dissipated energy based) type fatigue criteria. Similar to the findings for mechanical/constitutive behavior, our results show that the failure data and associated fatigue models for solder joints are affected significantly by isothermal aging prior to cycling. After development of the tools needed to include aging effects in solder joint reliability models, we have then applied these approaches to predict reliability of PBGA components attached to FR-4 printed circuit boards that were subjected to thermal cycling. Finite element modeling was performed to predict the stress-strain histories during thermal cycling of both non-aged and aged PBGA assemblies, where the aging at constant temperature occurred before the assemblies were subjected to thermal cycling. The results from the finite element calculations were then combined with the aging aware fatigue models to estimate the reliability (cycles to failure) for the aged and non-aged assemblies. As expected, the predictions show significant degradations in the solder joint life for assemblies that had been pre-aged before thermal cycling. To validate our new reliability models, an extensive test matrix of thermal cycling reliability testing has been performed using a test vehicle incorporating several sizes of fine pitch PBGA daisy chain components. Before thermal cycling began, the assembled test boards were divided up into test groups that were subjected to several sets of aging conditions (preconditioning) including different aging temperatures (T = 25, 55, 85 and 125 C) and different aging times (no aging, and 6 and 12 months). After aging, the assemblies were subjected to thermal cycling (−40 to +125 C) until failure occurred. As with the finite element predictions, the Weibull data failure plots have demonstrated that the thermal cycling reliabilities of pre-aged assemblies were significantly less than those of non-aged assemblies. Good correlation was obtained between our new reliability modeling procedure that includes aging and the measured solder joint reliability data.


2003 ◽  
Vol 125 (4) ◽  
pp. 498-505 ◽  
Author(s):  
Bart Vandevelde ◽  
Eric Beyne ◽  
Kouchi (G.Q.) Zhang ◽  
Jo Caers ◽  
Dirk Vandepitte ◽  
...  

Finite element modeling is widely used for estimating the solder joint reliability of electronic packages. In this study, the electronic package is a CSP mounted on a printed circuit board (PCB) using an area array of solder joints varying from 5×4 up to 7×7. An empirical model for estimating the reliability of CSP solder joints is derived by correlating the simulated strains to thermal cycling results for 20 different sample configurations. This empirical model translates the inelastic strains calculated by nonlinear three-dimensional (3D) finite element simulations into a reliability estimation (N50% or N100 ppm). By comparing with the results of reliability tests, it can be concluded that this model is accurate and consistent for analyzing the effect of solder joint geometry. Afterwards, parameter sensitivity analysis was conducted by integrating a design of experiment (DOE) analysis with the reliable solder fatigue prediction models, following the method of simulation-based optimization. Several parameters are analyzed: the PCB parameters (elastic modulus, coefficient of thermal expansion, thickness), the chip dimensions (area array configuration), and the parameters defining the solder joint geometry (substrate and chip pad diameter, solder volume). The first study analyzes how the solder joint geometry influences the CSP reliability. A second study is a tolerance analysis for six parameters. These parameters can have a tolerance (=accuracy) of their nominal value, and it is shown that these small tolerances can have a significant influence on the solder joint reliability.


2007 ◽  
Vol 353-358 ◽  
pp. 2932-2935
Author(s):  
Yong Cheng Lin ◽  
Xu Chen ◽  
Xing Shen Liu ◽  
Guo Quan Lu

The reliability of solder joints in flip chip assemblies with both compliant (flex) and rigid (PCB) substrates was studied by accelerated temperature cycling tests and finite element modeling (FEM). In-process electrical resistance measurements and nondestructive evaluations were conducted to monitor solder joint failure behavior, hence the fatigue failure life. Meanwhile, the predicted fatigue failure life of solder joints was obtained by Darveaux’s crack initiation and growth models. It can be concluded that the solder joints in flip chip on flex assembly (FCOF) have longer fatigue life than those in flip chip on rigid board assembly (FCOB); the maximum von Mises stress/strain and the maximum shear stress/strain of FCOB solder joints are much higher than those of FCOF solder joints; the thermal strain and stress in solder joints is reduced by flex buckling or bending and flex substrate could dissipate energy that otherwise would be absorbed by solder joint. Therefore, the substrate flexibility has a great effect on solder joint reliability and the reliability improvement was attributed to flex buckling or bending during temperature cycling.


Author(s):  
Chang-Chun Lee ◽  
Kuo-Ning Chiang

For the purpose of enhancing the solder joint reliability of a wafer level chip scaling package (WLCSP), the WLCSP adopted the familiar design structure where both the stress compliant layer with low elastic modulus and the dummy solder joints are considered as structural supports. However, the predicted fatigue life of the solder joints at the internal part of the packaging structure using the conventional procedures of finite element simulation are higher than under actual conditions as a result of the perfect bonding assumption in the modeling. In this research, in order to improve the thermo-mechanical reliability of the solder joints, a node tie-release crack prediction technique, based on non-linear finite element analysis (FEA), is developed and compared with the estimation of the solder joint reliability using conventional methodology. The predicted results of reliability, using the novel prediction technique, show a lower fatigue life of the solder joint than that when using conventional one when the fracture regions in the dummy solder joints are simulated under quasi-steady state. At the same time, the result of the thermal cycling test also shows good agreement with the simulated result when using the proposed node tie-release crack prediction analysis.


2014 ◽  
Vol 54 (5) ◽  
pp. 939-944 ◽  
Author(s):  
Ye Tian ◽  
Xi Liu ◽  
Justin Chow ◽  
Yi Ping Wu ◽  
Suresh K. Sitaraman

Sign in / Sign up

Export Citation Format

Share Document