RSFQ TECHNOLOGY: CIRCUITS AND SYSTEMS

2001 ◽  
Vol 11 (01) ◽  
pp. 307-362 ◽  
Author(s):  
DARREN K. BROCK

Rapid Single-Flux-Quantum (RSFQ) logic is a superconductor IC technology that, with only a modest number of researchers worldwide, has produced some of the world's highest performance digital and mixed-signal circuits. This achievement is due, in part, to a constellation of characteristics that manifest themselves at the circuit level – namely, high-speed digital logic at low-power, ideal interconnects, quantum accuracy, scalability, and simplicity of fabrication. A necessary key to translating these advantages to the system-level involves understanding the I/O, synchronization, and packaging issues associated with a cryogenic technology. The objective of this paper is to review the status of current RSFQ circuit-level infrastructure components and their potential impact on system-level applications.

Growing demand for portable devices and fast increases in complexity of chip cause power dissipation is an important parameter. Power consumption and dissipation or generations of more heat possess a restriction in the direction of the integration of more transistors. Several methods have been proposed to reduce power dissipation from system level to device level. Subthreshold circuits are widely used in more advanced applications due to ultra low-power consumption. The present work targets on construction of linear feedback shift registers (LFSR) in weak inversion region and their performance observed in terms of parameters like power delay product (PDP). In CMOS circuits subthreshold region of operation allows a low-power for ample utilizations but this advantage get with the penalty of flat speed. For the entrenched and high speed applications, improving the speed of subthreshold designs is essential. To enhance this, operate the devices at maximum current over capacitance. LFSR architectures build with various types of D flip flop and XOR gate circuits are analyzed. Circuit level Simulation is carried out using 130 nm technologies.


Author(s):  
Feng Li ◽  
Yuto Takeshita ◽  
Daiki Hasegawa ◽  
Masamitsu Tanaka ◽  
Taro Yamashita ◽  
...  

1995 ◽  
Vol 43 (12) ◽  
pp. 3048-3054 ◽  
Author(s):  
M. Hafizi ◽  
W.E. Stanchina ◽  
F. Williams ◽  
J.F. Jensen
Keyword(s):  

2008 ◽  
Vol 6 ◽  
pp. 165-173
Author(s):  
B. Dimov ◽  
Th. Ortlepp ◽  
V. Mladenov ◽  
S. Terzieva ◽  
F. H. Uhlmann

Abstract. In this paper, we investigate the application of the asynchronous logic approach for the realization of ultra high-speed digital electronics with high complexity. We evaluate the possible physical, technological, and schematical origins of restrictions limiting such an application, and propose solutions for their overcoming. Although our considerations are based on the rapid single-flux quantum technique, the conclusions derived can be generalized about any type of digital information coding.


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