Si-Passivated Ge Gate Sacks with Low Interface State and Oxide Trap Densities Using Thulium Silicate

The interface state density profile for an unstressed transistor has been carefully extracted. The experimental evidence of profile non-uniformity is presented. A scheme to separate the bulk oxide trap contribution from the total charge pumping current is suggested as an improvement to the conventional extraction procedure. The obtained information is of high importance in the context of hot-carrier degradation modeling in order to allow for a more detailed verification of the model.

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Gate-Side and Substrate-Side Oxide Trap and Interface State Generation in Conventional and Nitrided Tunnel Oxides of Floating Gate Cells

IEEE Transactions on Electron Devices ◽

10.1109/ted.2010.2102034 ◽

2011 ◽

Vol 58 (3) ◽

pp. 819-825 ◽

Cited By ~ 1

Author(s):

M. Florian Beug ◽

Georg Tempel ◽

Karl R. Hofmann

Keyword(s):

Interface State ◽

Floating Gate ◽

Substrate Side ◽

State Generation ◽

Oxide Trap ◽

Tunnel Oxides

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(G03 Best Paper Award Winner) Si-Passivated Ge Gate Sacks with Low Interface State and Oxide Trap Densities Using Thulium Silicate

ECS Meeting Abstracts ◽

10.1149/ma2020-02241752mtgabs ◽

2020 ◽

Vol MA2020-02 (24) ◽

pp. 1752-1752

Author(s):

Laura Zurauskaite ◽

Ahmad Abedin ◽

Per-Erik Hellström ◽

Mikael Östling

Keyword(s):

Interface State ◽

Paper Award ◽

Award Winner ◽

Oxide Trap

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Interface-State-Density Evaluation of p-type and n-type Ge/GeNx Structures by Conductance Technique

IEEJ Transactions on Electronics Information and Systems ◽

10.1541/ieejeiss.133.1279 ◽

2013 ◽

Vol 133 (7) ◽

pp. 1279-1284

Author(s):

Takuro Iwasaki ◽

Toshiro Ono ◽

Yohei Otani ◽

Yukio Fukuda ◽

Hiroshi Okamoto

Keyword(s):

Interface State ◽

State Density ◽

Interface State Density ◽

Conductance Technique ◽

Density Evaluation ◽

P Type

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Identification of Charging Effects in Plasma-Enhanced TEOS Deposition with Non-Contact Test Techniques

10.31399/asm.cp.istfa1998p0213 ◽

1998 ◽

Author(s):

Tomasz Brozek ◽

James Heddleson

Keyword(s):

Vapor Deposition ◽

Chemical Vapor ◽

Interface State ◽

State Density ◽

Interface State Density ◽

Wafer Surface ◽

Oxide Charge ◽

Contact Test ◽

Deposition Power ◽

Oxide Deposition

Abstract Use of non-contact test techniques to characterize degradation of the Si-SiO2 system on the wafer surface exposed to a plasma environment have proven themselves to be sensitive and useful in investigation of plasma charging level and uniformity. The current paper describes application of the surface charge analyzer and surface photo-voltage tool to explore process-induced charging occurring during plasma enhanced chemical vapor deposition (PECVD) of TEOS oxide. The oxide charge, the interface state density, and dopant deactivation are studied on blanket oxidized wafers with respect to the effect of oxide deposition, power lift step, and subsequent annealing.

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Interface state analysis using integrated room temperature gated photoluminescence

Electronics Letters ◽

10.1049/el:19930380 ◽

1993 ◽

Vol 29 (6) ◽

pp. 568 ◽

Cited By ~ 4

Author(s):

M. Ochiai ◽

P. Sebestyen ◽

D.L. Lile

Keyword(s):

Room Temperature ◽

Interface State ◽

State Analysis

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Using Oxide-Trap Charge-Pumping method in radiation reliability analysis of short lightly doped drain transistor

2009 European Conference on Radiation and Its Effects on Components and Systems ◽

10.1109/radecs.2009.5994552 ◽

2009 ◽

Author(s):

Boualem Djezzar ◽

Hakim Tahi

Keyword(s):

Reliability Analysis ◽

Trap Charge ◽

Charge Pumping ◽

Oxide Trap ◽

Lightly Doped Drain

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Investigation of the Impact of Hot-Carrier-Induced Interface State Generation on Carrier Mobility in nMOSFET

IEEE Transactions on Electron Devices ◽

10.1109/ted.2021.3080657 ◽

2021 ◽

pp. 1-8

Author(s):

Zhicheng Wu ◽

Jacopo Franco ◽

Brecht Truijen ◽

Philippe Roussel ◽

Ben Kaczer ◽

...

Keyword(s):

Carrier Mobility ◽

Interface State ◽

Hot Carrier ◽

State Generation ◽

The Impact

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Properties of MOS Structure Fabricated on 3C-SiC Grown by Reactive Magnetron Sputtering.

MRS Proceedings ◽

10.1557/proc-339-157 ◽

1994 ◽

Vol 339 ◽

Cited By ~ 1

Author(s):

R. Turan ◽

Q. Wahab ◽

L. Hultman ◽

M. Willander ◽

J. -E. Sundgren

Keyword(s):

Magnetron Sputtering ◽

Interface State ◽

State Density ◽

Reactive Magnetron Sputtering ◽

Oxide Semiconductor ◽

Reactive Magnetron ◽

Cross Sectional ◽

Mos Structure ◽

Transmission Electron ◽

Wide Bandgap Materials

ABSTRACTWe report the fabrication and the characterization of Metal Oxide Semiconductor (MOS) structure fabricated on thermally oxidized 3C-SiC grown by reactive magnetron sputtering. The structure and the composition of the SiO2 layer was studied by cross-sectional transmission electron microscopy (XTEM) Auger electron spectroscopy (AES). Homogeneous stoichiometric SiO2 layers formed with a well-defined interface to the faceted SiC(lll) top surface. Electrical properties of the MOS capacitor have been analyzed by employing the capacitance and conductance techniques. C-V curves shows the accumulation, depletion and deep depletion phases. The capacitance in the inversion regime is not saturated, as usually observed for wide-bandgap materials. The unintentional doping concentration determined from the 1/C2 curve was found to be as low as 2.8 × 1015 cm-3. The density of positive charges in the grown oxide and the interface states have been extracted by using high-frequency C-V and conductance techniques. The interface state density has been found to be in the order of 1011cm2-eV-1.

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