Inorganic Si-O-C Antireflection Coating at 193 nm for Cu Dual Damascene Process

2003 ◽  
Vol 150 (1) ◽  
pp. G58 ◽  
Author(s):  
Sang-Yun Lee ◽  
Yong-Bae Kim ◽  
Jeong Soo Byun
2003 ◽  
Vol 766 ◽  
Author(s):  
J. Gambino ◽  
T. Stamper ◽  
H. Trombley ◽  
S. Luce ◽  
F. Allen ◽  
...  

AbstractA trench-first dual damascene process has been developed for fat wires (1.26 μm pitch, 1.1 μm thickness) in a 0.18 μm CMOS process with copper/fluorosilicate glass (FSG) interconnect technology. The process window for the patterning of vias in such deep trenches depends on the trench depth and on the line width of the trench, with the worse case being an intermediate line width (lines that are 3X the via diameter). Compared to a single damascene process, the dual damascene process has comparable yield and reliability, with lower via resistance and lower cost.


2000 ◽  
Author(s):  
Soo Gun Lee ◽  
Hyeok-Sang Oh ◽  
Hong-Jae Shin ◽  
Jin-Gi Hong ◽  
Hyeon-Deok Lee ◽  
...  

2007 ◽  
Vol 20 (3) ◽  
pp. 245-251 ◽  
Author(s):  
Masatoshi Nagase ◽  
Takuya Maruyama ◽  
Makoto Sekine

2013 ◽  
Vol 58 (6) ◽  
pp. 143-150 ◽  
Author(s):  
A. Kabansky ◽  
S. S. H. Tan ◽  
E. A. Hudson ◽  
G. Delgadino ◽  
L. Gancs ◽  
...  

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